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Opteron (Socket 940) (NOT compatible with Socket AM2 CPUs!) | ||||
---|---|---|---|---|
AMD Processors | Natural State | Sockets | L1/L2 Cache (Associativity) | Transistors |
(Clawhammer DP) (128-bit on-Die DDR PC2700 mem controller; 8GB max) [not released] | 940 pins ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | ? million 0.13µm process 104mm² die |
Opteron 140 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC2700 mem controller; 8GB max) June 30, 2003 - {$229} | 940 pins 1400MHz (200x7) (64-bit dual-pumped bus) 1.5v or 1.55v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
Opteron 140EE MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC2700 mem controller; 8GB max) January, 2005 | 940 pins 1400MHz (200x7) (64-bit dual-pumped bus) 1.15v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
Opteron 142 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC2700 mem controller; 8GB max) June 30, 2003 - {$438} | 940 pins 1600MHz (200x8) (64-bit dual-pumped bus) 1.5v or 1.55v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
Opteron 144 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC2700 mem controller; 8GB max) June 30, 2003 - {$669} | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.5v or 1.55v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
Opteron 146 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) September 9, 2003 - {$669} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.5v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
Opteron 146HE MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) 2005? | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) ?v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
Opteron 148 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) November 17, 2003 - {$733} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.5v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
Opteron 150 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) May 18, 2004 - {$637} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.5v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
Opteron 240 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC2700 mem controller; 8GB max) April 22, 2003 - {$283} | 940 pins 1400MHz (200x7) (64-bit dual-pumped bus) 1.5v or 1.55v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
Opteron 240EE MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) January, 2005 | 940 pins 1400MHz (200x7) (64-bit dual-pumped bus) 1.15v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
Opteron 242 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC2700 mem controller; 8GB max) April 22, 2003 - {$690} | 940 pins 1600MHz (200x8) (64-bit dual-pumped bus) 1.5v or 1.55v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
Opteron 244 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC2700 mem controller; 8GB max) April 22, 2003 - {$794} | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.5v or 1.55v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
Opteron 246 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) August 5, 2003 - {$794} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.5v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
Opteron 246HE MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) January, 2005 | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) ?v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
Opteron 248 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) November 17, 2003 - {$913} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.5v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
Opteron 250 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) May 18, 2004 - {$851} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.5v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
Opteron 840 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC2700 mem controller; 8GB max) June 30, 2003 - {$749} | 940 pins 1400MHz (200x7) (64-bit dual-pumped bus) 1.5v or 1.55v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
Opteron 840EE MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) January, 2005 | 940 pins 1400MHz (200x7) (64-bit dual-pumped bus) 1.15v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
Opteron 842 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC2700 mem controller; 8GB max) June 30, 2003 - {$1299} | 940 pins 1600MHz (200x8) (64-bit dual-pumped bus) 1.5v or 1.55v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
Opteron 844 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC2700 mem controller; 8GB max) June 30, 2003 - {$2149} | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.5v or 1.55v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
Opteron 846 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) September 9, 2003 - {$3199} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.5v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
Opteron 846HE MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) 2005? | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) ?v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
Opteron 848 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) November 17, 2003 - {$3199} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.5v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
Opteron 850 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) May 18, 2004 - {$1514} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.5v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
Opteron 146 MMX 3DNow! SSE SSE2 (Venus) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.4v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
Opteron 148HE MMX 3DNow! SSE SSE2 (Venus) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) 1Q 2005 | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.3v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
Opteron 152 MMX 3DNow! SSE SSE2 (Venus) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) 2006 | 940 pins 2600MHz (200x13) (64-bit dual-pumped bus) ?v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
Opteron 154 MMX 3DNow! SSE SSE2 (Venus) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) 2006 | 940 pins 2800MHz (200x14) (64-bit dual-pumped bus) ?v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
Opteron 156 MMX 3DNow! SSE SSE2 (Venus) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) 2006 | 940 pins 3000MHz (200x15) (64-bit dual-pumped bus) ?v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
Opteron 242 MMX 3DNow! SSE SSE2 SSE3 (Troy) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$163} | 940 pins 1600MHz (200x8) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
Opteron 244 MMX 3DNow! SSE SSE2 SSE3 (Troy) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$209} | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
Opteron 246 MMX 3DNow! SSE SSE2 SSE3 (Troy) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$316} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.35v or 1.4v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
Opteron 248 MMX 3DNow! SSE SSE2 SSE3 (Troy) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$455} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.35v or 1.4v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
Opteron 248HE MMX 3DNow! SSE SSE2 SSE3 (Troy) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) 1Q 2005 | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.3v or 1.4v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
Opteron 250 MMX 3DNow! SSE SSE2 SSE3 (Troy) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$690} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
Opteron 252 MMX 3DNow! SSE SSE2 SSE3 (Troy) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$851} | 940 pins 2600MHz (200x13) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
Opteron 254 MMX 3DNow! SSE SSE2 SSE3 (Troy) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) October, 2005 - {$851} | 940 pins 2800MHz (200x14) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
Opteron 256 MMX 3DNow! SSE SSE2 SSE3 (Troy) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) 2006 | 940 pins 3000MHz (200x15) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
Opteron 842 MMX 3DNow! SSE SSE2 SSE3 (Athens) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$698} | 940 pins 1600MHz (200x8) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
Opteron 844 MMX 3DNow! SSE SSE2 SSE3 (Athens) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$698} | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
Opteron 846 MMX 3DNow! SSE SSE2 SSE3 (Athens) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$698} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.35v or 1.4v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
Opteron 848 MMX 3DNow! SSE SSE2 SSE3 (Athens) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$873} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
Opteron 848HE MMX 3DNow! SSE SSE2 SSE3 (Athens) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) 1Q 2005 | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.3v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
Opteron 850 MMX 3DNow! SSE SSE2 SSE3 (Athens) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$1165} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
Opteron 852 MMX 3DNow! SSE SSE2 SSE3 (Athens) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$1514} | 940 pins 2600MHz (200x13) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
Opteron 854 MMX 3DNow! SSE SSE2 SSE3 (Athens) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) August, 2005 | 940 pins 2800MHz (200x14) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
Opteron 856 MMX 3DNow! SSE SSE2 SSE3 (Athens) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) 2006 | 940 pins 3000MHz (200x15) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
Opteron 165 MMX 3DNow! SSE SSE2 SSE3 (Denmark) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) August 24, 2005 - {$637} | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) ?v | Socket 940 | 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
Opteron 165EE MMX 3DNow! SSE SSE2 SSE3 (Denmark) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) 2H 2005 | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.15v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
Opteron 170 MMX 3DNow! SSE SSE2 SSE3 (Denmark) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) August 24, 2005 - {$799} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) ?v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
Opteron 175 MMX 3DNow! SSE SSE2 SSE3 (Denmark) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) August 24, 2005 - {$999} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) ?v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
Opteron 180 MMX 3DNow! SSE SSE2 SSE3 (Denmark) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) October 24, 2005 - {$799} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) ?v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
Opteron 185 MMX 3DNow! SSE SSE2 SSE3 (Denmark) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) April, 2006 | 940 pins 2600MHz (200x13) (64-bit dual-pumped bus) ?v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
Opteron 260HE MMX 3DNow! SSE SSE2 SSE3 (Italy) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) 2H 2005 | 940 pins 1600MHz (200x8) (64-bit dual-pumped bus) 1.15v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
Opteron 265 MMX 3DNow! SSE SSE2 SSE3 (Italy) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) August 4, 2005 - {$851} | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.35v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
Opteron 265HE MMX 3DNow! SSE SSE2 SSE3 (Italy) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) 2H 2005 | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.15v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
Opteron 270 MMX 3DNow! SSE SSE2 SSE3 (Italy) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) August 4, 2005 - {$1051} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.35v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
Opteron 270HE MMX 3DNow! SSE SSE2 SSE3 (Italy) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) 2H 2005 | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.15v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
Opteron 275 MMX 3DNow! SSE SSE2 SSE3 (Italy) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) August 4, 2005 - {$1299} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.35v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
Opteron 275HE MMX 3DNow! SSE SSE2 SSE3 (Italy) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) 2006 | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.15v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
Opteron 280 MMX 3DNow! SSE SSE2 SSE3 (Italy) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) September 26, 2005 - {$1299} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.35v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
Opteron 285 MMX 3DNow! SSE SSE2 SSE3 (Italy) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) March 6, 2006 - {$1051} | 940 pins 2600MHz (200x13) (64-bit dual-pumped bus) 1.35v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
Opteron 290 MMX 3DNow! SSE SSE2 SSE3 (Italy) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) 2006 | 940 pins 2800MHz (200x14) (64-bit dual-pumped bus) 1.35v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
Opteron 860HE MMX 3DNow! SSE SSE2 SSE3 (Egypt) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) 2H 2005 | 940 pins 1600MHz (200x8) (64-bit dual-pumped bus) 1.2v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
Opteron 865 MMX 3DNow! SSE SSE2 SSE3 (Egypt) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) April 21, 2005 - {$1514} | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) ?v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
Opteron 865HE MMX 3DNow! SSE SSE2 SSE3 (Egypt) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) 2H 2005 | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.2v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
Opteron 870 MMX 3DNow! SSE SSE2 SSE3 (Egypt) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) April 21, 2005 - {$2169} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) ?v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
Opteron 870HE MMX 3DNow! SSE SSE2 SSE3 (Egypt) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) 2H 2005 | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.2v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
Opteron 875 MMX 3DNow! SSE SSE2 SSE3 (Egypt) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) April 21, 2005 - {$2649} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) ?v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
Opteron 880 MMX 3DNow! SSE SSE2 SSE3 (Egypt) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) September 26, 2005 - {$2649} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) ?v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
Opteron 885 MMX 3DNow! SSE SSE2 SSE3 (Egypt) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) March 6, 2006 - {$2149} | 940 pins 2600MHz (200x13) (64-bit dual-pumped bus) ?v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
Opteron 890 MMX 3DNow! SSE SSE2 SSE3 (Egypt) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) 2006 | 940 pins 2800MHz (200x14) (64-bit dual-pumped bus) ?v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
Opteron (Socket 939) | ||||
---|---|---|---|---|
AMD Processors | Natural State | Sockets | L1/L2 Cache (Associativity) | Transistors |
Opteron 144 MMX 3DNow! SSE SSE2 (Venus - unbuffered) (128-bit on-Die ECC unbuffered DDR PC3200 mem controller; 8GB max) August 2, 2005 - {$125} | 939 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.4v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
Opteron 146 MMX 3DNow! SSE SSE2 (Venus - unbuffered) (128-bit on-Die ECC unbuffered DDR PC3200 mem controller; 8GB max) August 2, 2005 | 939 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.4v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
Opteron 148 MMX 3DNow! SSE SSE2 (Venus - unbuffered) (128-bit on-Die ECC unbuffered DDR PC3200 mem controller; 8GB max) August 2, 2005 | 939 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.4v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
Opteron 150 MMX 3DNow! SSE SSE2 (Venus - unbuffered) (128-bit on-Die ECC unbuffered DDR PC3200 mem controller; 8GB max) August 2, 2005 | 939 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.4v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
Opteron 152 MMX 3DNow! SSE SSE2 (Venus - unbuffered) (128-bit on-Die ECC unbuffered DDR PC3200 mem controller; 8GB max) August 2, 2005 - {$799} | 939 pins 2600MHz (200x13) (64-bit dual-pumped bus) 1.4v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
Opteron 154 MMX 3DNow! SSE SSE2 (Venus - unbuffered) (128-bit on-Die ECC unbuffered DDR PC3200 mem controller; 8GB max) 2H 2005 | 939 pins 2800MHz (200x14) (64-bit dual-pumped bus) 1.4v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
Opteron 165 MMX 3DNow! SSE SSE2 SSE3 (Denmark - unbuffered) (128-bit on-Die ECC unbuffered DDR PC3200 mem controller) (dual core) 2H 2005 | 939 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.35v | Socket 939 | 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
Opteron 170 MMX 3DNow! SSE SSE2 SSE3 (Denmark - unbuffered) (128-bit on-Die ECC unbuffered DDR PC3200 mem controller) (dual core) 2H 2005 | 939 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.35v | Socket 939 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
Opteron 175 MMX 3DNow! SSE SSE2 SSE3 (Denmark - unbuffered) (128-bit on-Die ECC unbuffered DDR PC3200 mem controller) (dual core) 2H 2005 | 939 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.35v | Socket 939 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
Opteron (Socket AM2) | ||||
---|---|---|---|---|
AMD Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
Opteron 1210 MMX 3DNow! SSE SSE2 SSE3 (Santa Ana) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) August 15, 2006 - {$255} | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.35v | Socket AM2 Socket AM2+ | 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 1210 HE MMX 3DNow! SSE SSE2 SSE3 (Santa Ana) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) February 7, 2007 - {$168} | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.25v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 1212 MMX 3DNow! SSE SSE2 SSE3 (Santa Ana) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) August 15, 2006 - {$377} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.35v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 1212 HE MMX 3DNow! SSE SSE2 SSE3 (Santa Ana) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) February 7, 2007 - {$209} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.25v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 1214 MMX 3DNow! SSE SSE2 SSE3 (Santa Ana) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) August 15, 2006 - {$523} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.35v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 1214 HE MMX 3DNow! SSE SSE2 SSE3 (Santa Ana) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) February 7, 2007 - {$247} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.25v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 1216 MMX 3DNow! SSE SSE2 SSE3 (Santa Ana) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) August 15, 2006 - {$698} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.35v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 1216 HE MMX 3DNow! SSE SSE2 SSE3 (Santa Ana) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) February 7, 2007 - {$291} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.25v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 1218 MMX 3DNow! SSE SSE2 SSE3 (Santa Ana) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) August 15, 2006 - {$873} | 940 pins 2600MHz (200x13) (64-bit dual-pumped bus) 1.35v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 1218 HE MMX 3DNow! SSE SSE2 SSE3 (Santa Ana) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) February 7, 2007 - {$432} | 940 pins 2600MHz (200x13) (64-bit dual-pumped bus) 1.25v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 1220 MMX 3DNow! SSE SSE2 SSE3 (Santa Ana) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) February 7, 2007 - {$545} | 940 pins 2800MHz (200x14) (64-bit dual-pumped bus) 1.35v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 1220 SE MMX 3DNow! SSE SSE2 SSE3 (Santa Ana) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) August 15, 2006 - {$1165} | 940 pins 2800MHz (200x14) (64-bit dual-pumped bus) 1.4v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 1222 MMX 3DNow! SSE SSE2 SSE3 (Santa Ana) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) 2008 | 940 pins 3000MHz (200x15) (64-bit dual-pumped bus) 1.35v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 1222 SE MMX 3DNow! SSE SSE2 SSE3 (Santa Ana) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) 2008 | 940 pins 3000MHz (200x15) (64-bit dual-pumped bus) 1.4v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 1224 SE MMX 3DNow! SSE SSE2 SSE3 (Santa Ana) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) 2008 | 940 pins 3200MHz (200x16) (64-bit dual-pumped bus) 1.4v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 1352 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Budapest) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) June 3, 2008 - {$209} | 940 pins 2100MHz (200x10.5) (64-bit dual-pumped bus) ?v | Socket AM2+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
Opteron 1354 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Budapest) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) June 3, 2008 - {$255} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) ?v | Socket AM2+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
Opteron 1356 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Budapest) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) June 3, 2008 - {$377} | 940 pins 2300MHz (200x11.5) (64-bit dual-pumped bus) ?v | Socket AM2+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
Opteron (Socket AM3) | ||||
---|---|---|---|---|
AMD Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
Opteron 1381 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Suzuka) (128-bit on-Die ECC DDR3 PC6400 mem controller) (quad core, HT 3.0, DICE) June, 2009 - {$189} | 938 pins 2500MHz (200x12.5) (64-bit dual-pumped bus) ?v | Socket AM3 | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
Opteron 1385 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Suzuka) (128-bit on-Die ECC DDR3 PC6400 mem controller) (quad core, HT 3.0, DICE) June, 2009 - {$229} | 938 pins 2700MHz (200x13.5) (64-bit dual-pumped bus) ?v | Socket AM3 | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
Opteron 1389 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Suzuka) (128-bit on-Die ECC DDR3 PC6400 mem controller) (quad core, HT 3.0, DICE) June, 2009 - {$269} | 938 pins 2900MHz (200x14.5) (64-bit dual-pumped bus) ?v | Socket AM3 | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
Opteron (Socket AM3+) | ||||
---|---|---|---|---|
AMD Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
Opteron 3250 HE MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Zurich) (128-bit on-Die ECC DDR3 PC10666 mem controller) (quad core, HT 3.1, DICE, AMD-V, Turbo) March 20, 2012 - {$99} | 942 pins 2500MHz (200x12.5) (3.5GHz Turbo) (64-bit dual-pumped bus) ?v | Socket AM3+ | 4x 16KB data (4-way) 2x 64KB shared instruction (2-way) 4x 1MB on-Die unified L2 (16-way) 4MB on-Die shared L3 (?-way) | ? million 0.032µm process 315mm² die |
Opteron 3260 HE MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Zurich) (128-bit on-Die ECC DDR3 PC10666 mem controller) (quad core, HT 3.1, DICE, AMD-V, Turbo) March 20, 2012 | 942 pins 2700MHz (200x13.5) (3.7GHz Turbo) (64-bit dual-pumped bus) ?v | Socket AM3+ | 4x 16KB data (4-way) 2x 64KB shared instruction (2-way) 4x 1MB on-Die unified L2 (16-way) 4MB on-Die shared L3 (?-way) | ? million 0.032µm process 315mm² die |
Opteron 3280 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Zurich) (128-bit on-Die ECC DDR3 PC10666 mem controller) (8 cores, HT 3.0, DICE, AMD-V, Turbo) March 20, 2012 | 2400MHz (200x12) (3.5GHz Turbo) (64-bit dual-pumped bus) ?v | Socket AM3+ | 4x 64KB shared instruction (2-way) 4x 2MB on-Die shared L2 (16-way) 8MB on-Die shared L3 (?-way) | ? million 0.032µm process 315mm² die |
Opteron (Socket F) | ||||
---|---|---|---|---|
AMD Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
Opteron 2210 MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$255} | 1207 balls 1800MHz (200x9) (64-bit dual-pumped bus) 1.35v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 2210 HE MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$316} | 1207 balls 1800MHz (200x9) (64-bit dual-pumped bus) 1.25v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 2212 MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$377} | 1207 balls 2000MHz (200x10) (64-bit dual-pumped bus) 1.35v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 2212 HE MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$450} | 1207 balls 2000MHz (200x10) (64-bit dual-pumped bus) 1.25v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 2214 MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$523} | 1207 balls 2200MHz (200x11) (64-bit dual-pumped bus) 1.35v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 2214 HE MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$611} | 1207 balls 2200MHz (200x11) (64-bit dual-pumped bus) 1.25v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 2216 MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$698} | 1207 balls 2400MHz (200x12) (64-bit dual-pumped bus) 1.35v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 2216 HE MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$786} | 1207 balls 2400MHz (200x12) (64-bit dual-pumped bus) 1.25v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 2218 MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$873} | 1207 balls 2600MHz (200x13) (64-bit dual-pumped bus) 1.35v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 2218 HE MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) February 7, 2007 - {$611} | 1207 balls 2600MHz (200x13) (64-bit dual-pumped bus) 1.25v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 2220 MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) February 7, 2007 - {$698} | 1207 balls 2800MHz (200x14) (64-bit dual-pumped bus) 1.35v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 2220 SE MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$1165} | 1207 balls 2800MHz (200x14) (64-bit dual-pumped bus) 1.375v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 2222 SE MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) 2008 | 1207 balls 3000MHz (200x15) (64-bit dual-pumped bus) 1.375v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 2224 SE MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) 2008 | 1207 balls 3200MHz (200x16) (64-bit dual-pumped bus) 1.4v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 8212 MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$873} | 1207 balls 2000MHz (200x10) (64-bit dual-pumped bus) 1.35v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 8212 HE MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$1019} | 1207 balls 2000MHz (200x10) (64-bit dual-pumped bus) 1.25v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 8214 MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$1165} | 1207 balls 2200MHz (200x11) (64-bit dual-pumped bus) 1.35v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 8214 HE MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$1340} | 1207 balls 2200MHz (200x11) (64-bit dual-pumped bus) 1.25v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 8216 MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$1514} | 1207 balls 2400MHz (200x12) (64-bit dual-pumped bus) 1.35v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 8216 HE MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$1832} | 1207 balls 2400MHz (200x12) (64-bit dual-pumped bus) 1.25v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 8218 MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$2149} | 1207 balls 2600MHz (200x13) (64-bit dual-pumped bus) 1.35v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 8218 HE MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) February 7, 2007 - {$1340} | 1207 balls 2600MHz (200x13) (64-bit dual-pumped bus) 1.25v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 8220 MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) February 7, 2007 - {$1514} | 1207 balls 2800MHz (200x14) (64-bit dual-pumped bus) 1.35v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 8220 SE MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$2649} | 1207 balls 2800MHz (200x14) (64-bit dual-pumped bus) 1.375v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 8222 MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) April 9, 2008 - {$1514} | 1207 balls 3000MHz (200x15) (64-bit dual-pumped bus) 1.35v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 8222 SE MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) April 9, 2008 - {$1514} | 1207 balls 3000MHz (200x15) (64-bit dual-pumped bus) 1.375v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
Opteron 8224 SE MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) April 9, 2008 - {$2149} | 1207 balls 3200MHz (200x16) (64-bit dual-pumped bus) 1.4v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
(Deerhound) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) [cancelled] | 1207 balls ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket F | 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) | 0.065µm process ?mm² die |
(Greyhound) (128-bit on-Die registered DDR2 PC5400, or FBD mem controller) (quad core, HT 3.0, DICE) [cancelled] | 1207 balls ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | ? million ?µm process ?mm² die |
(Zamora) (128-bit on-Die FBD mem controller) (quad core, HT 3.0, DICE) [cancelled] | 1207 balls ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | ? million ?µm process ?mm² die |
(Cadiz) (128-bit on-Die registered DDR2/3 PC? mem controller) (quad core, HT 3.0, DICE) [cancelled] | 1207 balls ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) | ? million ?µm process ?mm² die |
Opteron 2344 HE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) September 10, 2007 | 1207 balls 1700MHz (200x8.5) (64-bit dual-pumped bus) 1.15v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
Opteron 2346 HE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) September 10, 2007 | 1207 balls 1800MHz (200x9) (64-bit dual-pumped bus) 1.15v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
Opteron 2347 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) September 10, 2007 | 1207 balls 1900MHz (200x9.5) (64-bit dual-pumped bus) 1.2v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
Opteron 2347 HE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) September 10, 2007 | 1207 balls 1900MHz (200x9.5) (64-bit dual-pumped bus) 1.15v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
Opteron 2350 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) September 10, 2007 | 1207 balls 2000MHz (200x10) (64-bit dual-pumped bus) 1.2v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
Opteron 2352 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) April 9, 2008 - {$316} | 1207 balls 2100MHz (200x10.5) (64-bit dual-pumped bus) 1.2v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
Opteron 2354 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) April 9, 2008 - {$455} | 1207 balls 2200MHz (200x11) (64-bit dual-pumped bus) 1.2v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
Opteron 2356 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) April 9, 2008 - {$690} | 1207 balls 2300MHz (200x11.5) (64-bit dual-pumped bus) 1.2v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
Opteron 2358 SE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) April 9, 2008 - {$873} | 1207 balls 2400MHz (200x12) (64-bit dual-pumped bus) ?v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
Opteron 2360 SE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) April 9, 2008 - {$1165} | 2500MHz (200x12.5) (64-bit dual-pumped bus) ?v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
Opteron 8346 HE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) September 10, 2007 | 1207 balls 1800MHz (200x9) (64-bit dual-pumped bus) 1.15v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
Opteron 8347 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) September 10, 2007 | 1207 balls 1900MHz (200x9.5) (64-bit dual-pumped bus) 1.2v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
Opteron 8347 HE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) September 10, 2007 | 1207 balls 1900MHz (200x9.5) (64-bit dual-pumped bus) 1.15v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
Opteron 8350 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) September 10, 2007 | 1207 balls 2000MHz (200x10) (64-bit dual-pumped bus) 1.2v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
Opteron 8354 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) April 9, 2008 - {$1165} | 1207 balls 2200MHz (200x11) (64-bit dual-pumped bus) 1.2v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
Opteron 8356 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) April 9, 2008 - {$1514} | 1207 balls 2300MHz (200x11.5) (64-bit dual-pumped bus) 1.2v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
Opteron 8358 SE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) April 9, 2008 - {$1865} | 1207 balls 2400MHz (200x12) (64-bit dual-pumped bus) ?v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
Opteron 8360 SE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) April 9, 2008 - {$2149} | 1207 balls 2500MHz (200x12.5) (64-bit dual-pumped bus) ?v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
Opteron 2372 HE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) January 26, 2009 - {$316} | 1207 balls 2100MHz (200x10.5) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
Opteron 2373 EE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) April 22, 2009 | 1207 balls 2100MHz (200x10.5) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
Opteron 2374 HE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) January 26, 2009 - {$450} | 1207 balls 2200MHz (200x11) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
Opteron 2376 HE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) January 26, 2009 - {$575} | 1207 balls 2300MHz (200x11.5) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
Opteron 2376 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) November 13, 2008 - {$377} | 1207 balls 2300MHz (200x11.5) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
Opteron 2377 EE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) April 22, 2009 | 1207 balls 2300MHz (200x11.5) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
Opteron 2378 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) November 13, 2008 - {$523} | 1207 balls 2400MHz (200x12) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
Opteron 2379 HE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) April 22, 2009 - {$450} | 1207 balls 2400MHz (200x12) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
Opteron 2380 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) November 13, 2008 - {$698} | 1207 balls 2500MHz (200x12.5) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
Opteron 2381 HE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) April 22, 2009 - {$575} | 1207 balls 2500MHz (200x12.5) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
Opteron 2382 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) November 13, 2008 - {$873} | 1207 balls 2600MHz (200x13) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
Opteron 2384 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) November 13, 2008 - {$989} | 1207 balls 2700MHz (200x13.5) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
Opteron 2386 SE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) January 26, 2009 | 1207 balls 2800MHz (200x14) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
Opteron 2387 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) April 22, 2009 - {$873} | 1207 balls 2800MHz (200x14) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
Opteron 2389 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) April 22, 2009 - {$989} | 1207 balls 2900MHz (200x14.5) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
Opteron 2393 SE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) April 22, 2009 - {$1165} | 1207 balls 3100MHz (200x15.5) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
Opteron 8374 HE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) January 26, 2009 - {$1165} | 1207 balls 2200MHz (200x11) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
Opteron 8376 HE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) January 26, 2009 - {$1514} | 1207 balls 2300MHz (200x11.5) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
Opteron 8378 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) November 13, 2008 - {$1165} | 1207 balls 2400MHz (200x12) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
Opteron 8379 HE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) April 22, 2009 - {$450} | 1207 balls 2400MHz (200x12) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
Opteron 8380 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) November 13, 2008 - {$1514} | 1207 balls 2500MHz (200x12.5) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
Opteron 8381 HE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) April 22, 2009 - {$575} | 1207 balls 2500MHz (200x12.5) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
Opteron 8382 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) November 13, 2008 - {$1865} | 1207 balls 2600MHz (200x13) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
Opteron 8384 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) November 13, 2008 - {$2149} | 1207 balls 2700MHz (200x13.5) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
Opteron 8386 SE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) January 26, 2009 | 1207 balls 2800MHz (200x14) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
Opteron 8387 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) April 22, 2009 - {$873} | 1207 balls 2800MHz (200x14) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
Opteron 8389 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) April 22, 2009 - {$989} | 1207 balls 2900MHz (200x14.5) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
Opteron 8393 SE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) April 22, 2009 - {$2649} | 1207 balls 3100MHz (200x15.5) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
Opteron 2419 HE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Istanbul) (128-bit on-Die registered DDR2 PC5400 mem controller) (6 cores, HT 3.0, DICE) August 31, 2009 - {$989} | 1207 balls 1800MHz (200x9) (64-bit dual-pumped bus) ?v | Socket F+ | 6x 64KB data (2-way) 6x 64KB instruction (2-way) 6x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 904 million 0.045µm process 346mm² die |
Opteron 2423 HE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Istanbul) (128-bit on-Die registered DDR2 PC5400 mem controller) (6 cores, HT 3.0, DICE) July 13, 2009 - {$455} | 1207 balls 2000MHz (200x10) (64-bit dual-pumped bus) ?v | Socket F+ | 6x 64KB data (2-way) 6x 64KB instruction (2-way) 6x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 904 million 0.045µm process 346mm² die |
Opteron 2425 HE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Istanbul) (128-bit on-Die registered DDR2 PC5400 mem controller) (6 cores, HT 3.0, DICE) July 13, 2009 - {$523} | 1207 balls 2100MHz (200x10.5) (64-bit dual-pumped bus) ?v | Socket F+ | 6x 64KB data (2-way) 6x 64KB instruction (2-way) 6x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 904 million 0.045µm process 346mm² die |
Opteron 2427 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Istanbul) (128-bit on-Die registered DDR2 PC5400 mem controller) (6 cores, HT 3.0, DICE) June 1, 2009 - {$455} | 1207 balls 2200MHz (200x11) (64-bit dual-pumped bus) ?v | Socket F+ | 6x 64KB data (2-way) 6x 64KB instruction (2-way) 6x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 904 million 0.045µm process 346mm² die |
Opteron 2431 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Istanbul) (128-bit on-Die registered DDR2 PC5400 mem controller) (6 cores, HT 3.0, DICE) June 1, 2009 - {$698} | 1207 balls 2400MHz (200x12) (64-bit dual-pumped bus) ?v | Socket F+ | 6x 64KB data (2-way) 6x 64KB instruction (2-way) 6x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 904 million 0.045µm process 346mm² die |
Opteron 2435 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Istanbul) (128-bit on-Die registered DDR2 PC5400 mem controller) (6 cores, HT 3.0, DICE) June 1, 2009 - {$989} | 1207 balls 2600MHz (200x13) (64-bit dual-pumped bus) ?v | Socket F+ | 6x 64KB data (2-way) 6x 64KB instruction (2-way) 6x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 904 million 0.045µm process 346mm² die |
Opteron 2439 SE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Istanbul) (128-bit on-Die registered DDR2 PC5400 mem controller) (6 cores, HT 3.0, DICE) July 13, 2009 - {$1019} | 1207 balls 2800MHz (200x14) (64-bit dual-pumped bus) ?v | Socket F+ | 6x 64KB data (2-way) 6x 64KB instruction (2-way) 6x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 904 million 0.045µm process 346mm² die |
Opteron 8425 HE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Istanbul) (128-bit on-Die registered DDR2 PC5400 mem controller) (6 cores, HT 3.0, DICE) July 13, 2009 - {$1514} | 1207 balls 2100MHz (200x10.5) (64-bit dual-pumped bus) ?v | Socket F+ | 6x 64KB data (2-way) 6x 64KB instruction (2-way) 6x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 904 million 0.045µm process 346mm² die |
Opteron 8431 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Istanbul) (128-bit on-Die registered DDR2 PC5400 mem controller) (6 cores, HT 3.0, DICE) June 1, 2009 - {$2149} | 1207 balls 2400MHz (200x12) (64-bit dual-pumped bus) ?v | Socket F+ | 6x 64KB data (2-way) 6x 64KB instruction (2-way) 6x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 904 million 0.045µm process 346mm² die |
Opteron 8435 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Istanbul) (128-bit on-Die registered DDR2 PC5400 mem controller) (6 cores, HT 3.0, DICE) June 1, 2009 - {$2649} | 1207 balls 2600MHz (200x13) (64-bit dual-pumped bus) ?v | Socket F+ | 6x 64KB data (2-way) 6x 64KB instruction (2-way) 6x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 904 million 0.045µm process 346mm² die |
Opteron 8439 SE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Istanbul) (128-bit on-Die registered DDR2 PC5400 mem controller) (6 cores, HT 3.0, DICE) July 13, 2009 - {$2649} | 1207 balls 2800MHz (200x14) (64-bit dual-pumped bus) ?v | Socket F+ | 6x 64KB data (2-way) 6x 64KB instruction (2-way) 6x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 904 million 0.045µm process 346mm² die |
(Sandtiger) (128-bit on-Die registered DDR3 PC? mem controller) (8 cores, HT 3.0, DICE) [cancelled] | 1207 balls ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket F+ | 8x 64KB data (2-way) 8x 64KB instruction (2-way) 8x ?KB on-Die unified L2 (16-way exclusive) | ? million 0.045µm process ?mm² die |
Opteron (Socket C32) | ||||
---|---|---|---|---|
AMD Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
Opteron 4122 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Lisbon) (128-bit on-Die registered DDR3 PC10666 mem controller) (6 cores, HT 3.0, DICE, AMD-V) June 23, 2010 - {$99} | 1207 balls 2200MHz (200x11) (64-bit dual-pumped bus) 1.3125v | Socket C32 | 6x 64KB data (2-way) 6x 64KB instruction (2-way) 6x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (?-way) | 904 million 0.045µm process 346mm² die |
Opteron 4130 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Lisbon) (128-bit on-Die registered DDR3 PC10666 mem controller) (6 cores, HT 3.0, DICE, AMD-V) June 23, 2010 - {$125} | 1207 balls 2600MHz (200x13) (64-bit dual-pumped bus) 1.3125v | Socket C32 | 6x 64KB data (2-way) 6x 64KB instruction (2-way) 6x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (?-way) | 904 million 0.045µm process 346mm² die |
Opteron 4162 EE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Lisbon) (128-bit on-Die registered DDR3 PC10666 mem controller) (6 cores, HT 3.0, DICE, AMD-V) June 23, 2010 - {$316} | 1207 balls 1700MHz (200x8.5) (64-bit dual-pumped bus) 0.9625v | Socket C32 | 6x 64KB data (2-way) 6x 64KB instruction (2-way) 6x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (?-way) | 904 million 0.045µm process 346mm² die |
Opteron 4164 EE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Lisbon) (128-bit on-Die registered DDR3 PC10666 mem controller) (6 cores, HT 3.0, DICE, AMD-V) June 23, 2010 - {$698} | 1207 balls 1800MHz (200x9) (64-bit dual-pumped bus) 0.9625v | Socket C32 | 6x 64KB data (2-way) 6x 64KB instruction (2-way) 6x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (?-way) | 904 million 0.045µm process 346mm² die |
Opteron 4170 HE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Lisbon) (128-bit on-Die registered DDR3 PC10666 mem controller) (6 cores, HT 3.0, DICE, AMD-V) June 23, 2010 - {$174} | 1207 balls 2100MHz (200x10.5) (64-bit dual-pumped bus) 1.1875v | Socket C32 | 6x 64KB data (2-way) 6x 64KB instruction (2-way) 6x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (?-way) | 904 million 0.045µm process 346mm² die |
Opteron 4174 HE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Lisbon) (128-bit on-Die registered DDR3 PC10666 mem controller) (6 cores, HT 3.0, DICE, AMD-V) June 23, 2010 - {$255} | 1207 balls 2300MHz (200x11.5) (64-bit dual-pumped bus) 1.1875v | Socket C32 | 6x 64KB data (2-way) 6x 64KB instruction (2-way) 6x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (?-way) | 904 million 0.045µm process 346mm² die |
Opteron 4176 HE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Lisbon) (128-bit on-Die registered DDR3 PC10666 mem controller) (6 cores, HT 3.0, DICE, AMD-V) June 23, 2010 - {$377} | 1207 balls 2400MHz (200x12) (64-bit dual-pumped bus) 1.1875v | Socket C32 | 6x 64KB data (2-way) 6x 64KB instruction (2-way) 6x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (?-way) | 904 million 0.045µm process 346mm² die |
Opteron 4180 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Lisbon) (128-bit on-Die registered DDR3 PC10666 mem controller) (6 cores, HT 3.0, DICE, AMD-V) June 23, 2010 - {$188} | 1207 balls 2600MHz (200x13) (64-bit dual-pumped bus) 1.35v | Socket C32 | 6x 64KB data (2-way) 6x 64KB instruction (2-way) 6x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (?-way) | 904 million 0.045µm process 346mm² die |
Opteron 4184 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Lisbon) (128-bit on-Die registered DDR3 PC10666 mem controller) (6 cores, HT 3.0, DICE, AMD-V) June 23, 2010 - {$316} | 1207 balls 2800MHz (200x14) (64-bit dual-pumped bus) 1.35v | Socket C32 | 6x 64KB data (2-way) 6x 64KB instruction (2-way) 6x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (?-way) | 904 million 0.045µm process 346mm² die |
Opteron 4226 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Valencia) (128-bit on-Die registered DDR3 PC10666 mem controller) (6 cores, HT 3.1, DICE, AMD-V) November 16, 2011 - {$125) | 1207 balls 2700MHz (200x13.5) (64-bit dual-pumped bus) ?v | Socket C32 | 6x 16KB data (4-way) 3x 64KB shared instruction (2-way) 6x 2MB on-Die unified L2 (16-way) 8MB on-Die shared L3 (64-way) | 1200 million 0.032µm process 315mm² die |
Opteron 4228 HE MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Valencia) (128-bit on-Die registered DDR3 PC10666 mem controller) (6 cores, HT 3.1, DICE, AMD-V) November 16, 2011 - {$255} | 1207 balls 2800MHz (200x14) (64-bit dual-pumped bus) ?v | Socket C32 | 6x 16KB data (4-way) 3x 64KB shared instruction (2-way) 6x 2MB on-Die unified L2 (16-way) 8MB on-Die shared L3 (64-way) | 1200 million 0.032µm process 315mm² die |
Opteron 4230 HE MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Valencia) (128-bit on-Die registered DDR3 PC10666 mem controller) (6 cores, HT 3.1, DICE, AMD-V) June 4, 2012 - {$377} | 1207 balls 2900MHz (200x14.5) (64-bit dual-pumped bus) ?v | Socket C32 | 6x 16KB data (4-way) 3x 64KB shared instruction (2-way) 6x 2MB on-Die unified L2 (16-way) 8MB on-Die shared L3 (64-way) | 1200 million 0.032µm process 315mm² die |
Opteron 4234 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Valencia) (128-bit on-Die registered DDR3 PC10666 mem controller) (6 cores, HT 3.1, DICE, AMD-V) November 16, 2011 - {$174} | 1207 balls 3100MHz (200x15.5) (64-bit dual-pumped bus) ?v | Socket C32 | 6x 16KB data (4-way) 3x 64KB shared instruction (2-way) 6x 2MB on-Die unified L2 (16-way) 8MB on-Die shared L3 (64-way) | 1200 million 0.032µm process 315mm² die |
Opteron 4238 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Valencia) (128-bit on-Die registered DDR3 PC10666 mem controller) (6 cores, HT 3.1, DICE, AMD-V) November 16, 2011 - {$255} | 1207 balls 3300MHz (200x16.5) (64-bit dual-pumped bus) ?v | Socket C32 | 6x 16KB data (4-way) 3x 64KB shared instruction (2-way) 6x 2MB on-Die unified L2 (16-way) 8MB on-Die shared L3 (64-way) | 1200 million 0.032µm process 315mm² die |
Opteron 4240 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Valencia) (128-bit on-Die registered DDR3 PC10666 mem controller) (6 cores, HT 3.1, DICE, AMD-V) June 4, 2012 - {$316} | 1207 balls 3400MHz (200x17) (64-bit dual-pumped bus) ?v | Socket C32 | 6x 16KB data (4-way) 3x 64KB shared instruction (2-way) 6x 2MB on-Die unified L2 (16-way) 8MB on-Die shared L3 (64-way) | 1200 million 0.032µm process 315mm² die |
Opteron 4256 EE MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Valencia) (128-bit on-Die registered DDR3 PC10666 mem controller) (8 cores, HT 3.1, DICE, AMD-V) November 16, 2011 - {$377} | 1207 balls 2500MHz (200x12.5) (64-bit dual-pumped bus) ?v | Socket C32 | 8x 16KB data (4-way) 4x 64KB shared instruction (2-way) 8x 2MB on-Die unified L2 (16-way) 8MB on-Die shared L3 (64-way) | 1200 million 0.032µm process 315mm² die |
Opteron 4274 HE MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Valencia) (128-bit on-Die registered DDR3 PC10666 mem controller) (8 cores, HT 3.1, DICE, AMD-V) November 16, 2011 - {$377} | 1207 balls 2500MHz (200x12.5) (64-bit dual-pumped bus) ?v | Socket C32 | 8x 16KB data (4-way) 4x 64KB shared instruction (2-way) 8x 2MB on-Die unified L2 (16-way) 8MB on-Die shared L3 (64-way) | 1200 million 0.032µm process 315mm² die |
Opteron 4276 HE MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Valencia) (128-bit on-Die registered DDR3 PC10666 mem controller) (8 cores, HT 3.1, DICE, AMD-V) June 4, 2012 - {$455} | 1207 balls 2600MHz (200x13) (64-bit dual-pumped bus) ?v | Socket C32 | 8x 16KB data (4-way) 4x 64KB shared instruction (2-way) 8x 2MB on-Die unified L2 (16-way) 8MB on-Die shared L3 (64-way) | 1200 million 0.032µm process 315mm² die |
Opteron 4280 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Valencia) (128-bit on-Die registered DDR3 PC10666 mem controller) (8 cores, HT 3.1, DICE, AMD-V) November 16, 2011 - {$255} | 1207 balls 2800MHz (200x14) (64-bit dual-pumped bus) ?v | Socket C32 | 8x 16KB data (4-way) 4x 64KB shared instruction (2-way) 8x 2MB on-Die unified L2 (16-way) 8MB on-Die shared L3 (64-way) | 1200 million 0.032µm process 315mm² die |
Opteron 4284 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Valencia) (128-bit on-Die registered DDR3 PC10666 mem controller) (8 cores, HT 3.1, DICE, AMD-V) November 16, 2011 - {$316} | 1207 balls 3000MHz (200x15) (64-bit dual-pumped bus) ?v | Socket C32 | 8x 16KB data (4-way) 4x 64KB shared instruction (2-way) 8x 2MB on-Die unified L2 (16-way) 8MB on-Die shared L3 (64-way) | 1200 million 0.032µm process 315mm² die |
Opteron 3320 EE MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Delhi) (128-bit on-Die registered DDR3 PC10666 mem controller, AMD-V, Turbo) (quad core, HT 3.0, DICE) December 4, 2012 - {$174} | 1900MHz (200x9.5) (2.5GHz Turbo) (64-bit dual-pumped bus) ?v | Socket C32 | 2x 64KB shared instruction (2-way) 2x 2MB on-Die shared L2 (16-way) 8MB on-Die shared L3 (?-way) | ? million 0.032µm process ?mm² die |
Opteron 3350 HE MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Delhi) (128-bit on-Die registered DDR3 PC14933 mem controller, AMD-V, Turbo) (quad core, HT 3.0, DICE) December 4, 2012 - {$125} | 2800MHz (200x14) (3.8GHz Turbo) (64-bit dual-pumped bus) ?v | Socket C32 | 2x 64KB shared instruction (2-way) 2x 2MB on-Die shared L2 (16-way) 8MB on-Die shared L3 (?-way) | ? million 0.032µm process ?mm² die |
Opteron 3380 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Delhi) (128-bit on-Die registered DDR3 PC14933 mem controller, AMD-V, Turbo) (8 cores, HT 3.0, DICE) December 4, 2012 - {$229} | 2600MHz (200x13) (3.6GHz Turbo) (64-bit dual-pumped bus) ?v | Socket C32 | 4x 64KB shared instruction (2-way) 4x 2MB on-Die shared L2 (16-way) 8MB on-Die shared L3 (?-way) | ? million 0.032µm process ?mm² die |
Opteron 4310 EE MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Seoul) (128-bit on-Die registered DDR3 PC14933 mem controller, AMD-V, Turbo) (quad core, HT 3.0, DICE) December 4, 2012 - {$415} | 2200MHz (200x11) (3.0GHz Turbo) (64-bit dual-pumped bus) ?v | Socket C32 | 2x 64KB shared instruction (2-way) 2x 2MB on-Die shared L2 (16-way) 8MB on-Die shared L3 (?-way) | ? million 0.032µm process ?mm² die |
Opteron 4332 HE MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Seoul) (128-bit on-Die registered DDR3 PC14933 mem controller, AMD-V, Turbo) (6 cores, HT 3.0, DICE) December 4, 2012 - {$415} | 3000MHz (200x15) (3.7GHz Turbo) (64-bit dual-pumped bus) ?v | Socket C32 | 3x 64KB shared instruction (2-way) 3x 2MB on-Die shared L2 (16-way) 8MB on-Die shared L3 (?-way) | ? million 0.032µm process ?mm² die |
Opteron 4334 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Seoul) (128-bit on-Die registered DDR3 PC14933 mem controller, AMD-V, Turbo) (6 cores, HT 3.0, DICE) December 4, 2012 - {$191} | 3100MHz (200x15.5) (3.5GHz Turbo) (64-bit dual-pumped bus) ?v | Socket C32 | 3x 64KB shared instruction (2-way) 3x 2MB on-Die shared L2 (16-way) 8MB on-Die shared L3 (?-way) | ? million 0.032µm process ?mm² die |
Opteron 4340 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Seoul) (128-bit on-Die registered DDR3 PC14933 mem controller, AMD-V, Turbo) (6 cores, HT 3.0, DICE) December 4, 2012 - {$348} | 3500MHz (200x17.5) (3.8GHz Turbo) (64-bit dual-pumped bus) ?v | Socket C32 | 3x 64KB shared instruction (2-way) 3x 2MB on-Die shared L2 (16-way) 8MB on-Die shared L3 (?-way) | ? million 0.032µm process ?mm² die |
Opteron 4376 HE MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Seoul) (128-bit on-Die registered DDR3 PC14933 mem controller, AMD-V, Turbo) (8 cores, HT 3.0, DICE) December 4, 2012 - {$501} | 2600MHz (200x13) (3.6GHz Turbo) (64-bit dual-pumped bus) ?v | Socket C32 | 4x 64KB shared instruction (2-way) 4x 2MB on-Die shared L2 (16-way) 8MB on-Die shared L3 (?-way) | ? million 0.032µm process ?mm² die |
Opteron 4386 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Seoul) (128-bit on-Die registered DDR3 PC14933 mem controller, AMD-V, Turbo) (8 cores, HT 3.0, DICE) December 4, 2012 - {$348} | 3100MHz (200x15.5) (3.8GHz Turbo) (64-bit dual-pumped bus) ?v | Socket C32 | 4x 64KB shared instruction (2-way) 4x 2MB on-Die shared L2 (16-way) 8MB on-Die shared L3 (?-way) | ? million 0.032µm process ?mm² die |
Opteron (Socket G34) | ||||
---|---|---|---|---|
AMD Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
(Sao Paolo) (128-bit on-Die registered DDR3 PC10666 mem controller) (6 cores, HT 3.0, DICE, AMD-V) [cancelled] | ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket G34 | 6x 64KB instruction (2-way) 6x ?KB on-Die unified L2 (16-way exclusive) | ? million 0.045µm process ?mm² die |
Opteron 6124 HE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Magny Cours) (128-bit on-Die registered DDR3 PC10666 mem controller) (8 cores (dual die), HT 3.0, DICE, AMD-V) March 29, 2010 - {$455} | 1944 balls 1800MHz (200x9) (64-bit dual-pumped bus) 1.2v | Socket G34 | 8x 64KB data (2-way) 8x 64KB instruction (2-way) 8x 512KB on-Die unified L2 (16-way exclusive) 2x 6MB on-Die shared L3 (?-way) | 1808 million 0.045µm process (2) 346mm² die |
Opteron 6128 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Magny Cours) (128-bit on-Die registered DDR3 PC10666 mem controller) (8 cores (dual die), HT 3.0, DICE, AMD-V) March 29, 2010 - {$266} | 1944 balls 2000MHz (200x10) (64-bit dual-pumped bus) 1.3v | Socket G34 | 8x 64KB data (2-way) 8x 64KB instruction (2-way) 8x 512KB on-Die unified L2 (16-way exclusive) 2x 6MB on-Die shared L3 (?-way) | 1808 million 0.045µm process (2) 346mm² die |
Opteron 6128 HE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Magny Cours) (128-bit on-Die registered DDR3 PC10666 mem controller) (8 cores (dual die), HT 3.0, DICE, AMD-V) March 29, 2010 - {$523} | 1944 balls 2000MHz (200x10) (64-bit dual-pumped bus) 1.2v | Socket G34 | 8x 64KB data (2-way) 8x 64KB instruction (2-way) 8x 512KB on-Die unified L2 (16-way exclusive) 2x 6MB on-Die shared L3 (?-way) | 1808 million 0.045µm process (2) 346mm² die |
Opteron 6132 HE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Magny Cours) (128-bit on-Die registered DDR3 PC10666 mem controller) (8 cores (dual die), HT 3.0, DICE, AMD-V) February 14, 2011 - {$591} | 1944 balls 2200MHz (200x11) (64-bit dual-pumped bus) 1.2v | Socket G34 | 8x 64KB data (2-way) 8x 64KB instruction (2-way) 8x 512KB on-Die unified L2 (16-way exclusive) 2x 6MB on-Die shared L3 (?-way) | 1808 million 0.045µm process (2) 346mm² die |
Opteron 6134 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Magny Cours) (128-bit on-Die registered DDR3 PC10666 mem controller) (8 cores (dual die), HT 3.0, DICE, AMD-V) March 29, 2010 - {$523} | 1944 balls 2300MHz (200x11.5) (64-bit dual-pumped bus) 1.3v | Socket G34 | 8x 64KB data (2-way) 8x 64KB instruction (2-way) 8x 512KB on-Die unified L2 (16-way exclusive) 2x 6MB on-Die shared L3 (?-way) | 1808 million 0.045µm process (2) 346mm² die |
Opteron 6136 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Magny Cours) (128-bit on-Die registered DDR3 PC10666 mem controller) (8 cores (dual die), HT 3.0, DICE, AMD-V) March 29, 2010 - {$744} | 1944 balls 2400MHz (200x12) (64-bit dual-pumped bus) 1.3v | Socket G34 | 8x 64KB data (2-way) 8x 64KB instruction (2-way) 8x 512KB on-Die unified L2 (16-way exclusive) 2x 6MB on-Die shared L3 (?-way) | 1808 million 0.045µm process (2) 346mm² die |
Opteron 6140 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Magny Cours) (128-bit on-Die registered DDR3 PC10666 mem controller) (8 cores (dual die), HT 3.0, DICE, AMD-V) February 14, 2011 - {$989} | 1944 balls 2600MHz (200x13) (64-bit dual-pumped bus) 1.3v | Socket G34 | 8x 64KB data (2-way) 8x 64KB instruction (2-way) 8x 512KB on-Die unified L2 (16-way exclusive) 2x 6MB on-Die shared L3 (?-way) | 1808 million 0.045µm process (2) 346mm² die |
Opteron 6164 HE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Magny Cours) (256-bit on-Die registered DDR3 PC10666 mem controller) (12 cores (dual die), HT 3.0, DICE, AMD-V) March 29, 2010 - {$744} | 1944 balls 1700MHz (200x8.5) (64-bit dual-pumped bus) 1.075v | Socket G34 | 12x 64KB data (2-way) 12x 64KB instruction (2-way) 12x 512KB on-Die unified L2 (16-way exclusive) 2x 6MB on-Die shared L3 (?-way) | 1808 million 0.045µm process (2) 346mm² die |
Opteron 6166 HE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Magny Cours) (256-bit on-Die registered DDR3 PC10666 mem controller) (12 cores (dual die), HT 3.0, DICE, AMD-V) February 14, 2011 - {$873} | 1944 balls 1800MHz (200x9) (64-bit dual-pumped bus) 1.075v | Socket G34 | 12x 64KB data (2-way) 12x 64KB instruction (2-way) 12x 512KB on-Die unified L2 (16-way exclusive) 2x 6MB on-Die shared L3 (?-way) | 1808 million 0.045µm process (2) 346mm² die |
Opteron 6168 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Magny Cours) (256-bit on-Die registered DDR3 PC10666 mem controller) (12 cores (dual die), HT 3.0, DICE, AMD-V) March 29, 2010 - {$744} | 1944 balls 1900MHz (200x9.5) (64-bit dual-pumped bus) 1.1875v | Socket G34 | 12x 64KB data (2-way) 12x 64KB instruction (2-way) 12x 512KB on-Die unified L2 (16-way exclusive) 2x 6MB on-Die shared L3 (?-way) | 1808 million 0.045µm process (2) 346mm² die |
Opteron 6172 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Magny Cours) (256-bit on-Die registered DDR3 PC10666 mem controller) (12 cores (dual die), HT 3.0, DICE, AMD-V) March 29, 2010 - {$989} | 1944 balls 2100MHz (200x10.5) (64-bit dual-pumped bus) 1.1875v | Socket G34 | 12x 64KB data (2-way) 12x 64KB instruction (2-way) 12x 512KB on-Die unified L2 (16-way exclusive) 2x 6MB on-Die shared L3 (?-way) | 1808 million 0.045µm process (2) 346mm² die |
Opteron 6174 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Magny Cours) (256-bit on-Die registered DDR3 PC10666 mem controller) (12 cores (dual die), HT 3.0, DICE, AMD-V) March 29, 2010 - {$1165} | 1944 balls 2200MHz (200x11) (64-bit dual-pumped bus) 1.1875v | Socket G34 | 12x 64KB data (2-way) 12x 64KB instruction (2-way) 12x 512KB on-Die unified L2 (16-way exclusive) 2x 6MB on-Die shared L3 (?-way) | 1808 million 0.045µm process (2) 346mm² die |
Opteron 6176 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Magny Cours) (256-bit on-Die registered DDR3 PC10666 mem controller) (12 cores (dual die), HT 3.0, DICE, AMD-V) February 14, 2011 - {$1265} | 1944 balls 2300MHz (200x11.5) (64-bit dual-pumped bus) 1.1875v | Socket G34 | 12x 64KB data (2-way) 12x 64KB instruction (2-way) 12x 512KB on-Die unified L2 (16-way exclusive) 2x 6MB on-Die shared L3 (?-way) | 1808 million 0.045µm process (2) 346mm² die |
Opteron 6176 HE MMX 3DNow! SSE SSE2 SSE3 SSE4a (Magny Cours) (256-bit on-Die registered DDR3 PC10666 mem controller) (12 cores (dual die), HT 3.0, DICE, AMD-V) March 29, 2010 - {$1386} | 1944 balls 2300MHz (200x11.5) (64-bit dual-pumped bus) 1.25v | Socket G34 | 12x 64KB data (2-way) 12x 64KB instruction (2-way) 12x 512KB on-Die unified L2 (16-way exclusive) 2x 6MB on-Die shared L3 (?-way) | 1808 million 0.045µm process (2) 346mm² die |
Opteron 6180 MMX 3DNow! SSE SSE2 SSE3 SSE4a (Magny Cours) (256-bit on-Die registered DDR3 PC10666 mem controller) (12 cores (dual die), HT 3.0, DICE, AMD-V) February 14, 2011 - {$1514} | 1944 balls 2500MHz (200x12.5) (64-bit dual-pumped bus) 1.25v | Socket G34 | 12x 64KB data (2-way) 12x 64KB instruction (2-way) 12x 512KB on-Die unified L2 (16-way exclusive) 2x 6MB on-Die shared L3 (?-way) | 1808 million 0.045µm process (2) 346mm² die |
Opteron 6204 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Interlagos) (256-bit on-Die registered DDR3 PC10666 mem controller) (4 cores (dual die), HT 3.1, DICE, AMD-V) November 16, 2011 - {$455} | 1944 balls 3300MHz (200x16.5) (64-bit dual-pumped bus) ?v | Socket G34 | 4x 16KB data (4-way) 2x 64KB shared instruction (2-way) 4x 1MB on-Die unified L2 (16-way) 2x 8MB on-Die shared L3 (?-way) | ? million 0.032µm process (2) 315mm² die |
Opteron 6212 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Interlagos) (256-bit on-Die registered DDR3 PC10666 mem controller) (8 cores (dual die), HT 3.1, DICE, AMD-V, Turbo) November 16, 2011 - {$266} | 1944 balls 2800MHz (200x14) 3.7GHz Turbo (64-bit dual-pumped bus) ?v | Socket G34 | 8x 16KB data (4-way) 4x 64KB shared instruction (2-way) 8x 1MB on-Die unified L2 (16-way) 2x 8MB on-Die shared L3 (?-way) | ? million 0.032µm process (2) 315mm² die |
Opteron 6220 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Interlagos) (256-bit on-Die registered DDR3 PC10666 mem controller) (8 cores (dual die), HT 3.1, DICE, AMD-V, Turbo) November 16, 2011 - {$523} | 1944 balls 3000MHz (200x15) 3.6GHz Turbo (64-bit dual-pumped bus) ?v | Socket G34 | 8x 16KB data (4-way) 4x 64KB shared instruction (2-way) 8x 1MB on-Die unified L2 (16-way) 2x 8MB on-Die shared L3 (?-way) | ? million 0.032µm process (2) 315mm² die |
Opteron 6234 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Interlagos) (256-bit on-Die registered DDR3 PC10666 mem controller) (8 cores (dual die), HT 3.1, DICE, AMD-V, Turbo) November 16, 2011 - {$377} | 1944 balls 2300MHz (200x11.5) 3.1GHz Turbo (64-bit dual-pumped bus) ?v | Socket G34 | 12x 16KB data (4-way) 6x 64KB shared instruction (2-way) 12x 1MB on-Die unified L2 (16-way) 2x 8MB on-Die shared L3 (?-way) | ? million 0.032µm process (2) 315mm² die |
Opteron 6238 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Interlagos) (256-bit on-Die registered DDR3 PC10666 mem controller) (8 cores (dual die), HT 3.1, DICE, AMD-V, Turbo) November 16, 2011 - {$455} | 1944 balls 2500MHz (200x12.5) 3.3GHz Turbo (64-bit dual-pumped bus) ?v | Socket G34 | 12x 16KB data (4-way) 6x 64KB shared instruction (2-way) 12x 1MB on-Die unified L2 (16-way) 2x 8MB on-Die shared L3 (?-way) | ? million 0.032µm process (2) 315mm² die |
Opteron 6262 HE MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Interlagos) (256-bit on-Die registered DDR3 PC10666 mem controller) (16 cores (dual die), HT 3.1, DICE, AMD-V, Turbo) November 16, 2011 - {$523} | 1944 balls 1600MHz (200x8) 2.9GHz Turbo (64-bit dual-pumped bus) ?v | Socket G34 | 16x 16KB data (4-way) 8x 64KB shared instruction (2-way) 16x 1MB on-Die unified L2 (16-way) 2x 8MB on-Die shared L3 (?-way) | ? million 0.032µm process (2) 315mm² die |
Opteron 6272 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Interlagos) (256-bit on-Die registered DDR3 PC10666 mem controller) (16 cores (dual die), HT 3.1, DICE, AMD-V, Turbo) November 16, 2011 - {$523} | 1944 balls 2100MHz (200x10.5) 3.1GHz Turbo (64-bit dual-pumped bus) ?v | Socket G34 | 16x 16KB data (4-way) 8x 64KB shared instruction (2-way) 16x 1MB on-Die unified L2 (16-way) 2x 8MB on-Die shared L3 (?-way) | ? million 0.032µm process (2) 315mm² die |
Opteron 6274 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Interlagos) (256-bit on-Die registered DDR3 PC10666 mem controller) (16 cores (dual die), HT 3.1, DICE, AMD-V, Turbo) November 16, 2011 - {$639} | 1944 balls 2200MHz (200x11) 3.2GHz Turbo (64-bit dual-pumped bus) ?v | Socket G34 | 16x 16KB data (4-way) 8x 64KB shared instruction (2-way) 16x 1MB on-Die unified L2 (16-way) 2x 8MB on-Die shared L3 (?-way) | ? million 0.032µm process (2) 315mm² die |
Opteron 6276 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Interlagos) (256-bit on-Die registered DDR3 PC10666 mem controller) (16 cores (dual die), HT 3.1, DICE, AMD-V, Turbo) November 16, 2011 - {$788} | 1944 balls 2300MHz (200x11.5) 3.3GHz Turbo (64-bit dual-pumped bus) ?v | Socket G34 | 16x 16KB data (4-way) 8x 64KB shared instruction (2-way) 16x 1MB on-Die unified L2 (16-way) 2x 8MB on-Die shared L3 (?-way) | ? million 0.032µm process (2) 315mm² die |
Opteron 6282 SE MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Interlagos) (256-bit on-Die registered DDR3 PC10666 mem controller) (16 cores (dual die), HT 3.1, DICE, AMD-V, Turbo) November 16, 2011 - {$1019} | 1944 balls 2500MHz (200x12.5) 3.5GHz Turbo (64-bit dual-pumped bus) ?v | Socket G34 | 16x 16KB data (4-way) 8x 64KB shared instruction (2-way) 16x 1MB on-Die unified L2 (16-way) 2x 8MB on-Die shared L3 (?-way) | ? million 0.032µm process (2) 315mm² die |
Opteron 6278 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Interlagos) (256-bit on-Die registered DDR3 PC10666 mem controller) (16 cores (dual die), HT 3.1, DICE, AMD-V, Turbo) June 4, 2012 - {$989} | 1944 balls 2400MHz (200x12) 3.5GHz Turbo (64-bit dual-pumped bus) ?v | Socket G34 | 16x 16KB data (4-way) 8x 64KB shared instruction (2-way) 16x 1MB on-Die unified L2 (16-way) 2x 8MB on-Die shared L3 (?-way) | ? million 0.032µm process (2) 315mm² die |
Opteron 6284 SE MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Interlagos) (256-bit on-Die registered DDR3 PC10666 mem controller) (16 cores (dual die), HT 3.1, DICE, AMD-V, Turbo) June 4, 2012 - {$1265} | 1944 balls 2700MHz (200x13.5) 3.5GHz Turbo (64-bit dual-pumped bus) ?v | Socket G34 | 16x 16KB data (4-way) 8x 64KB shared instruction (2-way) 16x 1MB on-Die unified L2 (16-way) 2x 8MB on-Die shared L3 (?-way) | ? million 0.032µm process (2) 315mm² die |
Opteron 6308 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Abu Dhabi) (256-bit on-Die registered DDR3 PC12800 mem controller, AMD-V) (quad core, HT 3.0, DICE) November 5, 2012 - {$501} | 3500MHz (200x17.5) (64-bit dual-pumped bus) ?v | Socket G34 | 2x 64KB shared instruction (2-way) 2x 2MB on-Die shared L2 (16-way) 2x 8MB on-Die shared L3 (?-way) | ? million 0.032µm process ?mm² die |
Opteron 6320 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Abu Dhabi) (256-bit on-Die registered DDR3 PC12800 mem controller, AMD-V, Turbo) (8 cores, HT 3.0, DICE) November 5, 2012 - {$293} | 2800MHz (200x14) 3.3GHz Turbo (64-bit dual-pumped bus) ?v | Socket G34 | 4x 64KB shared instruction (2-way) 4x 2MB on-Die shared L2 (16-way) 2x 8MB on-Die shared L3 (?-way) | ? million 0.032µm process ?mm² die |
Opteron 6328 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Abu Dhabi) (256-bit on-Die registered DDR3 PC12800 mem controller, AMD-V, Turbo) (8 cores, HT 3.0, DICE) November 5, 2012 - {$575} | 3200MHz (200x16) 3.8GHz Turbo (64-bit dual-pumped bus) ?v | Socket G34 | 4x 64KB shared instruction (2-way) 4x 2MB on-Die shared L2 (16-way) 2x 8MB on-Die shared L3 (?-way) | ? million 0.032µm process ?mm² die |
Opteron 6344 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Abu Dhabi) (256-bit on-Die registered DDR3 PC12800 mem controller, AMD-V, Turbo) (12 cores, HT 3.0, DICE) November 5, 2012 - {$415} | 2600MHz (200x13) 3.2GHz Turbo (64-bit dual-pumped bus) ?v | Socket G34 | 6x 64KB shared instruction (2-way) 6x 2MB on-Die shared L2 (16-way) 2x 8MB on-Die shared L3 (?-way) | ? million 0.032µm process ?mm² die |
Opteron 6348 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Abu Dhabi) (256-bit on-Die registered DDR3 PC12800 mem controller, AMD-V, Turbo) (12 cores, HT 3.0, DICE) November 5, 2012 - {$575} | 2800MHz (200x14) 3.4GHz Turbo (64-bit dual-pumped bus) ?v | Socket G34 | 6x 64KB shared instruction (2-way) 6x 2MB on-Die shared L2 (16-way) 2x 8MB on-Die shared L3 (?-way) | ? million 0.032µm process ?mm² die |
Opteron 6366 HE MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Abu Dhabi) (256-bit on-Die registered DDR3 PC12800 mem controller, AMD-V, Turbo) (16 cores, HT 3.0, DICE) November 5, 2012 - {$575} | 1800MHz (200x9) 3.1GHz Turbo (64-bit dual-pumped bus) ?v | Socket G34 | 8x 64KB shared instruction (2-way) 8x 2MB on-Die shared L2 (16-way) 2x 8MB on-Die shared L3 (?-way) | ? million 0.032µm process ?mm² die |
Opteron 6376 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Abu Dhabi) (256-bit on-Die registered DDR3 PC12800 mem controller, AMD-V, Turbo) (16 cores, HT 3.0, DICE) November 5, 2012 - {$703} | 2300MHz (200x11.5) 3.2GHz Turbo (64-bit dual-pumped bus) ?v | Socket G34 | 8x 64KB shared instruction (2-way) 8x 2MB on-Die shared L2 (16-way) 2x 8MB on-Die shared L3 (?-way) | ? million 0.032µm process ?mm² die |
Opteron 6378 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Abu Dhabi) (256-bit on-Die registered DDR3 PC12800 mem controller, AMD-V, Turbo) (16 cores, HT 3.0, DICE) November 5, 2012 - {$867} | 2400MHz (200x12) 3.3GHz Turbo (64-bit dual-pumped bus) ?v | Socket G34 | 8x 64KB shared instruction (2-way) 8x 2MB on-Die shared L2 (16-way) 2x 8MB on-Die shared L3 (?-way) | ? million 0.032µm process ?mm² die |
Opteron 6380 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Abu Dhabi) (256-bit on-Die registered DDR3 PC12800 mem controller, AMD-V, Turbo) (16 cores, HT 3.0, DICE) November 5, 2012 - {$1088} | 2500MHz (200x12.5) 3.4GHz Turbo (64-bit dual-pumped bus) ?v | Socket G34 | 8x 64KB shared instruction (2-way) 8x 2MB on-Die shared L2 (16-way) 2x 8MB on-Die shared L3 (?-way) | ? million 0.032µm process ?mm² die |
Opteron 6386 SE MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Abu Dhabi) (256-bit on-Die registered DDR3 PC12800 mem controller, AMD-V, Turbo) (16 cores, HT 3.0, DICE) November 5, 2012 - {$1392} | 2800MHz (200x14) 3.5GHz Turbo (64-bit dual-pumped bus) ?v | Socket G34 | 8x 64KB shared instruction (2-way) 8x 2MB on-Die shared L2 (16-way) 2x 8MB on-Die shared L3 (?-way) | ? million 0.032µm process ?mm² die |
Opteron 6338P MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Warsaw) (256-bit on-Die registered DDR3 PC16000 mem controller, AMD-V, Turbo) (12 cores, HT 3.0, DICE) January 22, 2014 - {$377} | 2300MHz (200x11.5) 2.8GHz Turbo (64-bit dual-pumped bus) ?v | Socket G34 | 6x 32KB shared instruction (2-way) 12x 1MB on-Die shared L2 (16-way) 2x 8MB on-Die shared L3 (?-way) | ? million 0.032µm process ?mm² die |
Opteron 6344 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Warsaw) (256-bit on-Die registered DDR3 PC16000 mem controller, AMD-V, Turbo) (12 cores, HT 3.0, DICE) January 22, 2014 - {$415} | 2600MHz (200x13) 3.2GHz Turbo (64-bit dual-pumped bus) ?v | Socket G34 | 6x 32KB shared instruction (2-way) 12x 1MB on-Die shared L2 (16-way) 2x 8MB on-Die shared L3 (?-way) | ? million 0.032µm process ?mm² die |
Opteron 6348 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Warsaw) (256-bit on-Die registered DDR3 PC16000 mem controller, AMD-V, Turbo) (12 cores, HT 3.0, DICE) January 22, 2014 - {$575} | 2800MHz (200x14) 3.4GHz Turbo (64-bit dual-pumped bus) ?v | Socket G34 | 6x 32KB shared instruction (2-way) 12x 1MB on-Die shared L2 (16-way) 2x 8MB on-Die shared L3 (?-way) | ? million 0.032µm process ?mm² die |
Opteron 6370P MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Warsaw) (256-bit on-Die registered DDR3 PC16000 mem controller, AMD-V, Turbo) (16 cores, HT 3.0, DICE) January 22, 2014 - {$598} | 2000MHz (200x10) 2.5GHz Turbo (64-bit dual-pumped bus) ?v | Socket G34 | 8x 32KB shared instruction (2-way) 16x 1MB on-Die shared L2 (16-way) 2x 8MB on-Die shared L3 (?-way) | ? million 0.032µm process ?mm² die |
Opteron 6376 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Warsaw) (256-bit on-Die registered DDR3 PC16000 mem controller, AMD-V, Turbo) (16 cores, HT 3.0, DICE) January 22, 2014 - {$703} | 2300MHz (200x11.5) 3.2GHz Turbo (64-bit dual-pumped bus) ?v | Socket G34 | 8x 32KB shared instruction (2-way) 16x 1MB on-Die shared L2 (16-way) 2x 8MB on-Die shared L3 (?-way) | ? million 0.032µm process ?mm² die |
Opteron 6378 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Warsaw) (256-bit on-Die registered DDR3 PC16000 mem controller, AMD-V, Turbo) (16 cores, HT 3.0, DICE) January 22, 2014 - {$867} | 2400MHz (200x12) 3.3GHz Turbo (64-bit dual-pumped bus) ?v | Socket G34 | 8x 32KB shared instruction (2-way) 16x 1MB on-Die shared L2 (16-way) 2x 8MB on-Die shared L3 (?-way) | ? million 0.032µm process ?mm² die |
Opteron 6380 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Warsaw) (256-bit on-Die registered DDR3 PC16000 mem controller, AMD-V, Turbo) (16 cores, HT 3.0, DICE) January 22, 2014 - {$1088} | 2500MHz (200x12.5) 3.4GHz Turbo (64-bit dual-pumped bus) ?v | Socket G34 | 8x 32KB shared instruction (2-way) 16x 1MB on-Die shared L2 (16-way) 2x 8MB on-Die shared L3 (?-way) | ? million 0.032µm process ?mm² die |
Opteron 6386 SE MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Warsaw) (256-bit on-Die registered DDR3 PC16000 mem controller, AMD-V, Turbo) (16 cores, HT 3.0, DICE) January 22, 2014 - {$1392} | 2800MHz (200x14) 3.5GHz Turbo (64-bit dual-pumped bus) ?v | Socket G34 | 8x 32KB shared instruction (2-way) 16x 1MB on-Die shared L2 (16-way) 2x 8MB on-Die shared L3 (?-way) | ? million 0.032µm process ?mm² die |
Opteron (Socket FT3) | ||||
---|---|---|---|---|
AMD Processors | Natural State | Sockets | L1/L2 Cache (Associativity) | Transistors |
Opteron X1150 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Kyoto) (64-bit on-Die registered DDR3 PC12800 mem controller) (quad core, AMD-V) May 29, 2013 - ($64} | 2000MHz (200x10) (64-bit dual-pumped bus) ?v | Socket FT3 | 2x 32KB instruction (2-way) 2MB on-Die shared L2 (16-way) | ? million 0.028µm process ?mm² die |
Opteron X2150 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Kyoto) (64-bit on-Die registered DDR3 PC12800 mem controller) (quad core, Radeon HD 8000 APU, AMD-V) May 29, 2013 - ($99} | 1900MHz (200x9.5) (64-bit dual-pumped bus) ?v | Socket FT3 | 2x 32KB instruction (2-way) 2MB on-Die shared L2 (16-way) | ? million 0.028µm process ?mm² die |
Opteron ("Steamroller"-architecture) | ||||
---|---|---|---|---|
AMD Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
(Berlin) (128-bit on-Die registered DDR3 PC14933 mem controller) (quad core, Radeon HD ??? GPU, HT 3.0, DICE, AMD-V) [cancelled] | ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket ? | 2x 64KB shared instruction (2-way) 2x 2MB on-Die shared L2 (16-way) ?MB on-Die shared L3 (?-way) | ? million 0.028µm process ?mm² die |
Opteron (Socket "C2012 platform") | ||||
---|---|---|---|---|
AMD Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
(Sepang) (192-bit on-Die registered DDR3 PC? mem controller, AMD-V) (10 cores, HT 3.0, DICE) [cancelled] | ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket ? | 5x 64KB shared instruction (2-way) 5x ?KB on-Die shared L2 (16-way) ?MB on-Die shared L3 (?-way) | ? million 0.032µm process ?mm² die |
(Macau) (192-bit on-Die registered DDR3 PC? mem controller, AMD-V) (10 cores, HT 3.0, DICE) [cancelled] | ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket ? | 5x 64KB shared instruction (2-way) 5x ?KB on-Die shared L2 (16-way) ?MB on-Die shared L3 (?-way) | ? million 0.028µm process ?mm² die |
Opteron (Socket "G2012 platform") | ||||
---|---|---|---|---|
AMD Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
(Terramar) (256-bit on-Die registered DDR3 PC? mem controller, AMD-V) (20 cores (dual die), HT 3.0, DICE) [cancelled] | ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket ? | 10x 64KB shared instruction (2-way) 10x ?KB on-Die shared L2 (16-way) 2x ?MB on-Die shared L3 (?-way) | ? million 0.032µm process (2) ?mm² die |
(Dublin) (256-bit on-Die registered DDR3 PC? mem controller, AMD-V) (20 cores (dual die), HT 3.0, DICE) [cancelled] | ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket ? | 10x 64KB shared instruction (2-way) 10x ?KB on-Die shared L2 (16-way) 2x ?MB on-Die shared L3 (?-way) | ? million 0.028µm process (2) ?mm² die |
Epyc (Socket SP3) | ||||
---|---|---|---|---|
AMD Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
Epyc 7351P MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Naples) (256-bit on-Die ECC DDR4 PC21333 mem controller) (16 cores (quad die), Infinity, Turbo) June 20, 2017 - {$750} | 4094 balls 2400MHz (100x24) (2.9GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 16x 32KB data (8-way) 16x 64KB instruction (4-way) 16x 512KB on-Die L2 (8-way) 8x 8MB on-Die shared L3 (?-way) | ? million 0.014µm process (4) ?mm² die |
Epyc 7401P MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Naples) (256-bit on-Die ECC DDR4 PC21333 mem controller) (24 cores (quad die), Infinity, Turbo) June 20, 2017 - {$1075} | 4094 balls 2000MHz (100x20) (3.0GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 24x 32KB data (8-way) 24x 64KB instruction (4-way) 24x 512KB on-Die L2 (8-way) 8x 8MB on-Die shared L3 (?-way) | ? million 0.014µm process (4) ?mm² die |
Epyc 7551P MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Naples) (256-bit on-Die ECC DDR4 PC21333 mem controller) (32 cores (quad die), Infinity, Turbo) June 20, 2017 - {$2100} | 4094 balls 2000MHz (100x20) (3.0GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 32x 32KB data (8-way) 32x 64KB instruction (4-way) 32x 512KB on-Die L2 (8-way) 8x 8MB on-Die shared L3 (?-way) | ? million 0.014µm process (4) ?mm² die |
Epyc 7251 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Naples) (256-bit on-Die ECC DDR4 PC19200 mem controller) (8 cores (quad die), Infinity, Turbo) June 20, 2017 - {$475} | 4094 balls 2100MHz (100x21) (2.9GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 8x 32KB data (8-way) 8x 64KB instruction (4-way) 8x 512KB on-Die L2 (8-way) 8x 4MB on-Die shared L3 (?-way) | ? million 0.014µm process (4) ?mm² die |
Epyc 7281 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Naples) (256-bit on-Die ECC DDR4 PC21333 mem controller) (16 cores (quad die), Infinity, Turbo) June 20, 2017 - {$650} | 4094 balls 2100MHz (100x21) (2.7GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 16x 32KB data (8-way) 16x 64KB instruction (4-way) 16x 512KB on-Die L2 (8-way) 8x 4MB on-Die shared L3 (?-way) | ? million 0.014µm process (4) ?mm² die |
Epyc 7301 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Naples) (256-bit on-Die ECC DDR4 PC21333 mem controller) (16 cores (quad die), Infinity, Turbo) June 20, 2017 - {$800} | 4094 balls 2200MHz (100x22) (2.7GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 16x 32KB data (8-way) 16x 64KB instruction (4-way) 16x 512KB on-Die L2 (8-way) 8x 8MB on-Die shared L3 (?-way) | ? million 0.014µm process (4) ?mm² die |
Epyc 7351 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Naples) (256-bit on-Die ECC DDR4 PC21333 mem controller) (16 cores (quad die), Infinity, Turbo) June 20, 2017 - {$1100} | 4094 balls 2400MHz (100x24) (2.9GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 16x 32KB data (8-way) 16x 64KB instruction (4-way) 16x 512KB on-Die L2 (8-way) 8x 8MB on-Die shared L3 (?-way) | ? million 0.014µm process (4) ?mm² die |
Epyc 7401 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Naples) (256-bit on-Die ECC DDR4 PC21333 mem controller) (24 cores (quad die), Infinity, Turbo) June 20, 2017 - {$1850} | 4094 balls 2000MHz (100x20) (3.0GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 24x 32KB data (8-way) 24x 64KB instruction (4-way) 24x 512KB on-Die L2 (8-way) 8x 8MB on-Die shared L3 (?-way) | ? million 0.014µm process (4) ?mm² die |
Epyc 7451 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Naples) (256-bit on-Die ECC DDR4 PC21333 mem controller) (24 cores (quad die), Infinity, Turbo) June 20, 2017 - {$2400} | 4094 balls 2300MHz (100x23) (3.2GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 24x 32KB data (8-way) 24x 64KB instruction (4-way) 24x 512KB on-Die L2 (8-way) 8x 8MB on-Die shared L3 (?-way) | ? million 0.014µm process (4) ?mm² die |
Epyc 7501 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Naples) (256-bit on-Die ECC DDR4 PC21333 mem controller) (32 cores (quad die), Infinity, Turbo) June 20, 2017 - {$3400} | 4094 balls 2000MHz (100x20) (3.0GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 32x 32KB data (8-way) 32x 64KB instruction (4-way) 32x 512KB on-Die L2 (8-way) 8x 8MB on-Die shared L3 (?-way) | ? million 0.014µm process (4) ?mm² die |
Epyc 7551 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Naples) (256-bit on-Die ECC DDR4 PC21333 mem controller) (32 cores (quad die), Infinity, Turbo) June 20, 2017 - {$?} | 4094 balls 2000MHz (100x20) (3.0GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 32x 32KB data (8-way) 32x 64KB instruction (4-way) 32x 512KB on-Die L2 (8-way) 8x 8MB on-Die shared L3 (?-way) | ? million 0.014µm process (4) ?mm² die |
Epyc 7601 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Naples) (256-bit on-Die ECC DDR4 PC21333 mem controller) (32 cores (quad die), Infinity, Turbo) June 20, 2017 - {$4200} | 4094 balls 2200MHz (100x22) (3.2GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 32x 32KB data (8-way) 32x 64KB instruction (4-way) 32x 512KB on-Die L2 (8-way) 8x 8MB on-Die shared L3 (?-way) | ? million 0.014µm process (4) ?mm² die |
Epyc 7232P MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Rome) (256-bit on-Die ECC DDR4 PC25600 mem controller) (8 cores, Infinity, Turbo) August 7, 2019 - {$450} | 4094 balls 3100MHz (100x31) (3.4GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 512KB on-Die L2 (8-way) 2x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7252 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Rome) (256-bit on-Die ECC DDR4 PC25600 mem controller) (8 cores, Infinity, Turbo) August 7, 2019 - {$475} | 4094 balls 3100MHz (100x31) (3.2GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 512KB on-Die L2 (8-way) 4x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7262 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Rome) (256-bit on-Die ECC DDR4 PC25600 mem controller) (8 cores, Infinity, Turbo) August 7, 2019 - {$575} | 4094 balls 3200MHz (100x32) (3.4GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 512KB on-Die L2 (8-way) 8x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7272 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Rome) (256-bit on-Die ECC DDR4 PC25600 mem controller) (12 cores, Infinity, Turbo) August 7, 2019 - {$625} | 4094 balls 2900MHz (100x29) (3.2GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 12x 32KB data (8-way) 12x 32KB instruction (8-way) 12x 512KB on-Die L2 (8-way) 4x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7282 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Rome) (256-bit on-Die ECC DDR4 PC25600 mem controller) (16 cores, Infinity, Turbo) August 7, 2019 - {$650} | 4094 balls 2800MHz (100x28) (3.2GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 512KB on-Die L2 (8-way) 4x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7302 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Rome) (256-bit on-Die ECC DDR4 PC25600 mem controller) (16 cores, Infinity, Turbo) August 7, 2019 - {$978} | 4094 balls 3000MHz (100x30) (3.3GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 512KB on-Die L2 (8-way) 8x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7302P MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Rome) (256-bit on-Die ECC DDR4 PC25600 mem controller) (16 cores, Infinity, Turbo) August 7, 2019 - {$825} | 4094 balls 3000MHz (100x30) (3.3GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 512KB on-Die L2 (8-way) 8x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7352 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Rome) (256-bit on-Die ECC DDR4 PC25600 mem controller) (24 cores, Infinity, Turbo) August 7, 2019 - {$1350} | 4094 balls 2300MHz (100x23) (3.2GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 24x 32KB data (8-way) 24x 32KB instruction (8-way) 24x 512KB on-Die L2 (8-way) 8x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7402 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Rome) (256-bit on-Die ECC DDR4 PC25600 mem controller) (24 cores, Infinity, Turbo) August 7, 2019 - {$1783} | 4094 balls 2800MHz (100x28) (3.35GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 24x 32KB data (8-way) 24x 32KB instruction (8-way) 24x 512KB on-Die L2 (8-way) 8x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7402P MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Rome) (256-bit on-Die ECC DDR4 PC25600 mem controller) (24 cores, Infinity, Turbo) August 7, 2019 - {$1250} | 4094 balls 2800MHz (100x28) (3.35GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 24x 32KB data (8-way) 24x 32KB instruction (8-way) 24x 512KB on-Die L2 (8-way) 8x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7452 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Rome) (256-bit on-Die ECC DDR4 PC25600 mem controller) (32 cores, Infinity, Turbo) August 7, 2019 - {$2025} | 4094 balls 2350MHz (100x23.5) (3.35GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 32x 32KB data (8-way) 32x 32KB instruction (8-way) 32x 512KB on-Die L2 (8-way) 8x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7502 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Rome) (256-bit on-Die ECC DDR4 PC25600 mem controller) (32 cores, Infinity, Turbo) August 7, 2019 - {$2600} | 4094 balls 2500MHz (100x25) (3.35GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 32x 32KB data (8-way) 32x 32KB instruction (8-way) 32x 512KB on-Die L2 (8-way) 8x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7502P MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Rome) (256-bit on-Die ECC DDR4 PC25600 mem controller) (32 cores, Infinity, Turbo) August 7, 2019 - {$2300} | 4094 balls 2500MHz (100x25) (3.35GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 32x 32KB data (8-way) 32x 32KB instruction (8-way) 32x 512KB on-Die L2 (8-way) 8x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7542 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Rome) (256-bit on-Die ECC DDR4 PC25600 mem controller) (32 cores, Infinity, Turbo) August 7, 2019 - {$3400} | 4094 balls 2900MHz (100x29) (3.4GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 32x 32KB data (8-way) 32x 32KB instruction (8-way) 32x 512KB on-Die L2 (8-way) 8x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7552 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Rome) (256-bit on-Die ECC DDR4 PC25600 mem controller) (48 cores, Infinity, Turbo) August 7, 2019 - {$4025} | 4094 balls 2200MHz (100x22) (3.3GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 48x 32KB data (8-way) 48x 32KB instruction (8-way) 48x 512KB on-Die L2 (8-way) 12x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7642 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Rome) (256-bit on-Die ECC DDR4 PC25600 mem controller) (48 cores, Infinity, Turbo) August 7, 2019 - {$4775} | 4094 balls 2300MHz (100x23) (3.3GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 48x 32KB data (8-way) 48x 32KB instruction (8-way) 48x 512KB on-Die L2 (8-way) 16x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7702 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Rome) (256-bit on-Die ECC DDR4 PC25600 mem controller) (64 cores, Infinity, Turbo) August 7, 2019 - {$6450} | 4094 balls 2000MHz (100x20) (3.35GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 64x 32KB data (8-way) 64x 32KB instruction (8-way) 64x 512KB on-Die L2 (8-way) 16x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7702P MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Rome) (256-bit on-Die ECC DDR4 PC25600 mem controller) (64 cores, Infinity, Turbo) August 7, 2019 - {$4425} | 4094 balls 2000MHz (100x20) (3.35GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 64x 32KB data (8-way) 64x 32KB instruction (8-way) 64x 512KB on-Die L2 (8-way) 16x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7742 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX (Rome) (256-bit on-Die ECC DDR4 PC25600 mem controller) (64 cores, Infinity, Turbo) August 7, 2019 - {$6950} | 4094 balls 2250MHz (100x22.5) (3.4GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 64x 32KB data (8-way) 64x 32KB instruction (8-way) 64x 512KB on-Die L2 (8-way) 16x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 72F3 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Milan) (256-bit on-Die ECC DDR4 PC25600 mem controller) (8 cores, Infinity, SMT, Turbo) March 15, 2021 - {$2468} | 4094 balls 3700MHz (100x37.0) (4.1GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 512KB on-Die L2 (8-way) 16x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7313 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Milan) (256-bit on-Die ECC DDR4 PC25600 mem controller) (16 cores, Infinity, SMT, Turbo) March 15, 2021 - {$1565} | 4094 balls 3000MHz (100x30.0) (3.7GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 512KB on-Die L2 (8-way) 8x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7313P MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Milan) (256-bit on-Die ECC DDR4 PC25600 mem controller) (16 cores, Infinity, SMT, Turbo) March 15, 2021 - {$913} | 4094 balls 3000MHz (100x30.0) (3.7GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 512KB on-Die L2 (8-way) 8x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7343 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Milan) (256-bit on-Die ECC DDR4 PC25600 mem controller) (16 cores, Infinity, SMT, Turbo) March 15, 2021 - {$1565} | 4094 balls 3200MHz (100x32.0) (3.9GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 512KB on-Die L2 (8-way) 8x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 73F3 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Milan) (256-bit on-Die ECC DDR4 PC25600 mem controller) (16 cores, Infinity, SMT, Turbo) March 15, 2021 - {$3521} | 4094 balls 3500MHz (100x35.0) (4.0GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 512KB on-Die L2 (8-way) 16x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7413 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Milan) (256-bit on-Die ECC DDR4 PC25600 mem controller) (24 cores, Infinity, SMT, Turbo) March 15, 2021 - {$1825} | 4094 balls 2650MHz (100x26.5) (3.6GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 24x 32KB data (8-way) 24x 32KB instruction (8-way) 24x 512KB on-Die L2 (8-way) 8x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7443 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Milan) (256-bit on-Die ECC DDR4 PC25600 mem controller) (24 cores, Infinity, SMT, Turbo) March 15, 2021 - {$2010} | 4094 balls 2850MHz (100x28.5) (4.0GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 24x 32KB data (8-way) 24x 32KB instruction (8-way) 24x 512KB on-Die L2 (8-way) 8x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7443P MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Milan) (256-bit on-Die ECC DDR4 PC25600 mem controller) (24 cores, Infinity, SMT, Turbo) March 15, 2021 - {$1337} | 4094 balls 2850MHz (100x28.5) (4.0GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 24x 32KB data (8-way) 24x 32KB instruction (8-way) 24x 512KB on-Die L2 (8-way) 8x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 74F3 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Milan) (256-bit on-Die ECC DDR4 PC25600 mem controller) (24 cores, Infinity, SMT, Turbo) March 15, 2021 - {$2900} | 4094 balls 3200MHz (100x32.0) (4.0GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 24x 32KB data (8-way) 24x 32KB instruction (8-way) 24x 512KB on-Die L2 (8-way) 16x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7453 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Milan) (256-bit on-Die ECC DDR4 PC25600 mem controller) (28 cores, Infinity, SMT, Turbo) March 15, 2021 - {$1570} | 4094 balls 2750MHz (100x27.5) (3.45GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 28x 32KB data (8-way) 28x 32KB instruction (8-way) 28x 512KB on-Die L2 (8-way) 4x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7513 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Milan) (256-bit on-Die ECC DDR4 PC25600 mem controller) (32 cores, Infinity, SMT, Turbo) March 15, 2021 - {$2840} | 4094 balls 2600MHz (100x26.0) (3.65GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 32x 32KB data (8-way) 32x 32KB instruction (8-way) 32x 512KB on-Die L2 (8-way) 8x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7543 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Milan) (256-bit on-Die ECC DDR4 PC25600 mem controller) (32 cores, Infinity, SMT, Turbo) March 15, 2021 - {$3761} | 4094 balls 2800MHz (100x28.0) (3.7GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 32x 32KB data (8-way) 32x 32KB instruction (8-way) 32x 512KB on-Die L2 (8-way) 16x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7543P MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Milan) (256-bit on-Die ECC DDR4 PC25600 mem controller) (32 cores, Infinity, SMT, Turbo) March 15, 2021 - {$2730} | 4094 balls 2800MHz (100x28.0) (3.7GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 32x 32KB data (8-way) 32x 32KB instruction (8-way) 32x 512KB on-Die L2 (8-way) 16x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 75F3 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Milan) (256-bit on-Die ECC DDR4 PC25600 mem controller) (32 cores, Infinity, SMT, Turbo) March 15, 2021 - {$4860} | 4094 balls 2950MHz (100x29.5) (4.0GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 32x 32KB data (8-way) 32x 32KB instruction (8-way) 32x 512KB on-Die L2 (8-way) 16x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7643 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Milan) (256-bit on-Die ECC DDR4 PC25600 mem controller) (48 cores, Infinity, SMT, Turbo) March 15, 2021 - {$4995} | 4094 balls 2300MHz (100x23.0) (3.6GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 48x 32KB data (8-way) 48x 32KB instruction (8-way) 48x 512KB on-Die L2 (8-way) 16x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7663 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Milan) (256-bit on-Die ECC DDR4 PC25600 mem controller) (56 cores, Infinity, SMT, Turbo) March 15, 2021 - {$6366} | 4094 balls 2000MHz (100x20.0) (3.5GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 56x 32KB data (8-way) 56x 32KB instruction (8-way) 56x 512KB on-Die L2 (8-way) 16x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7713 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Milan) (256-bit on-Die ECC DDR4 PC25600 mem controller) (64 cores, Infinity, SMT, Turbo) March 15, 2021 - {$7060} | 4094 balls 2000MHz (100x20.0) (3.675GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 64x 32KB data (8-way) 64x 32KB instruction (8-way) 64x 512KB on-Die L2 (8-way) 16x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7713P MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Milan) (256-bit on-Die ECC DDR4 PC25600 mem controller) (64 cores, Infinity, SMT, Turbo) March 15, 2021 - {$5010} | 4094 balls 2000MHz (100x20.0) (3.675GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 64x 32KB data (8-way) 64x 32KB instruction (8-way) 64x 512KB on-Die L2 (8-way) 16x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Epyc 7763 MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Milan) (256-bit on-Die ECC DDR4 PC25600 mem controller) (64 cores, Infinity, SMT, Turbo) March 15, 2021 - {$7890} | 4094 balls 2450MHz (100x24.5) (3.5GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 64x 32KB data (8-way) 64x 32KB instruction (8-way) 64x 512KB on-Die L2 (8-way) 16x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Ryzen Threadripper Pro 3945WX MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Rome) (256-bit on-Die ECC DDR4 PC25600 mem controller) (12 cores, Infinity, HT 3.0, Turbo) March 3, 2021 | 4094 balls 4000MHz (100x40.0) (4.3GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 12x 32KB data (8-way) 12x 32KB instruction (8-way) 12x 512KB on-Die L2 (8-way) 4x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Ryzen Threadripper Pro 3955WX MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Rome) (256-bit on-Die ECC DDR4 PC25600 mem controller) (16 cores, Infinity, HT 3.0, Turbo) March 3, 2021 - {$1149} | 4094 balls 4000MHz (100x40.0) (4.3GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 512KB on-Die L2 (8-way) 4x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Ryzen Threadripper Pro 3975WX MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Rome) (256-bit on-Die ECC DDR4 PC25600 mem controller) (32 cores, Infinity, HT 3.0, Turbo) March 3, 2021 - {$2749} | 4094 balls 3500MHz (100x35.0) (4.2GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 32x 32KB data (8-way) 32x 32KB instruction (8-way) 32x 512KB on-Die L2 (8-way) 8x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Ryzen Threadripper Pro 3995WX MMX 3DNow! SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Rome) (256-bit on-Die ECC DDR4 PC25600 mem controller) (64 cores, Infinity, HT 3.0, Turbo) March 3, 2021 - {$5489} | 4094 balls 2700MHz (100x27.0) (4.2GHz Turbo) (64-bit dual-pumped bus) ?v | Socket SP3 | 64x 32KB data (8-way) 64x 32KB instruction (8-way) 64x 512KB on-Die L2 (8-way) 16x 16MB on-Die shared L3 (?-way) | ? million I/O 0.014µm process ? million chiplet 0.007µm process (8) ?mm² die |
Xeon (Socket 775) | ||||
---|---|---|---|---|
Intel Processors | Natural State | Sockets | L1/L2 Cache (Associativity) | Transistors |
Xeon 3040 MMX SSE SSE2 SSE3 (Conroe) (dual core, EM64T, NX bit, VT) September 26, 2006 | 775 balls 1866MHz (266x7) (64-bit quad-pumped bus) 1.2v | Socket 775 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 2MB on-Die shared L2 (8-way) | 291 million 0.065µm process 143mm² die |
Xeon 3050 MMX SSE SSE2 SSE3 (Conroe) (dual core, EM64T, NX bit, VT) September 26, 2006 | 775 balls 2133MHz (266x8) (64-bit quad-pumped bus) 1.2v | Socket 775 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 2MB on-Die shared L2 (8-way) | 291 million 0.065µm process 143mm² die |
Xeon 3060 MMX SSE SSE2 SSE3 (Conroe) (dual core, EM64T, NX bit, VT) September 26, 2006 | 775 balls 2400MHz (266x9) (64-bit quad-pumped bus) 1.2v | Socket 775 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-Die shared L2 (16-way) | 291 million 0.065µm process 143mm² die |
Xeon 3065 MMX SSE SSE2 SSE3 (Conroe) (dual core, EM64T, NX bit, VT) November 11, 2007 | 775 balls 2666MHz (333x7) (64-bit quad-pumped bus) 1.2v | Socket 775 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-Die shared L2 (16-way) | 291 million 0.065µm process 143mm² die |
Xeon 3070 MMX SSE SSE2 SSE3 (Conroe) (dual core, EM64T, NX bit, VT) September 26, 2006 | 775 balls 2666MHz (266x10) (64-bit quad-pumped bus) 1.2v | Socket 775 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-Die shared L2 (16-way) | 291 million 0.065µm process 143mm² die |
Xeon 3075 MMX SSE SSE2 SSE3 (Conroe) (dual core, EM64T, NX bit, VT) November 11, 2007 | 775 balls 2666MHz (333x8) (64-bit quad-pumped bus) 1.2v | Socket 775 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-Die shared L2 (16-way) | 291 million 0.065µm process 143mm² die |
Xeon 3085 MMX SSE SSE2 SSE3 (Conroe) (dual core, EM64T, NX bit, VT) November 11, 2007 | 775 balls 3000MHz (333x9) (64-bit quad-pumped bus) 1.2v | Socket 775 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-Die shared L2 (16-way) | 291 million 0.065µm process 143mm² die |
Xeon L3014 MMX SSE SSE2 SSE3 SSE4 (Wolfdale 3M) (dual core, EM64T, NX bit) 1Q, 2008 | 775 balls 2400MHz (266x9) (64-bit quad-pumped bus) ?v | Socket 775 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 3MB on-Die shared L2 (12-way) | 228 million 0.045µm process 82mm² die |
Xeon L3110 MMX SSE SSE2 SSE3 SSE4 (Wolfdale) (dual core, EM64T, NX bit, VT) February, 2009 - {$224} | 775 balls 3000MHz (333x9) (64-bit quad-pumped bus) ?v | Socket 775 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 6MB on-Die shared L2 (24-way) | 410 million 0.045µm process 107mm² die |
Xeon E3110 MMX SSE SSE2 SSE3 SSE4 (Wolfdale) (dual core, EM64T, NX bit, VT) January, 2008 | 775 balls 3000MHz (333x9) (64-bit quad-pumped bus) ?v | Socket 775 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 6MB on-Die shared L2 (24-way) | 410 million 0.045µm process 107mm² die |
Xeon E3120 MMX SSE SSE2 SSE3 SSE4 (Wolfdale) (dual core, EM64T, NX bit, VT) August 11, 2008 - {$188} | 775 balls 3166MHz (333x9.5) (64-bit quad-pumped bus) ?v | Socket 775 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 8MB on-Die shared L2 (24-way) | 410 million 0.045µm process 107mm² die |
Xeon X3210 MMX SSE SSE2 SSE3 (Kentsfield) (quad core (dual die), EM64T, NX bit, VT) January 8, 2007 - {$690} | 775 balls 2133MHz (266x8) (64-bit quad-pumped bus) ?v | Socket 775 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB on-Die shared L2 (16-way) | 582 million 0.065µm process (2) 142mm² die |
Xeon X3220 MMX SSE SSE2 SSE3 (Kentsfield) (quad core (dual die), EM64T, NX bit, VT) January 8, 2007 - {$851} | 775 balls 2400MHz (266x9) (64-bit quad-pumped bus) ?v | Socket 775 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB on-Die shared L2 (16-way) | 582 million 0.065µm process (2) 142mm² die |
Xeon X3230 MMX SSE SSE2 SSE3 (Kentsfield) (quad core (dual die), EM64T, NX bit, VT) 3Q 2007 | 775 balls 2666MHz (266x10) (64-bit quad-pumped bus) ?v | Socket 775 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB on-Die shared L2 (16-way) | 582 million 0.065µm process (2) 142mm² die |
Xeon X3320 MMX SSE SSE2 SSE3 SSE4 (Yorkfield) (quad core (dual die), EM64T, NX bit, VT) March 24, 2008 - {$266} | 775 balls 2500MHz (333x7.5) (64-bit quad-pumped bus) ?v | Socket 775 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 3MB on-Die shared L2 (12-way) | 820 million 0.045µm process (2) 107mm² die |
Xeon X3330 MMX SSE SSE2 SSE3 SSE4 (Yorkfield) (quad core (dual die), EM64T, NX bit, VT) August 11, 2008 - {$266} | 775 balls 2666MHz (333x8) (64-bit quad-pumped bus) ?v | Socket 775 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 3MB on-Die shared L2 (12-way) | 820 million 0.045µm process (2) 107mm² die |
Xeon X3350 MMX SSE SSE2 SSE3 SSE4 (Yorkfield) (quad core (dual die), EM64T, NX bit, VT) March 24, 2008 - {$316} | 775 balls 2666MHz (333x8) (64-bit quad-pumped bus) ?v | Socket 775 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process (2) 107mm² die |
Xeon L3360 MMX SSE SSE2 SSE3 SSE4 (Yorkfield) (quad core (dual die), EM64T, NX bit, VT) February, 2009 - {$369} | 775 balls 2833MHz (333x8.5) (64-bit quad-pumped bus) ?v | Socket 775 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process (2) 107mm² die |
Xeon X3360 MMX SSE SSE2 SSE3 SSE4 (Yorkfield) (quad core (dual die), EM64T, NX bit, VT) March 24, 2008 - {$530} | 775 balls 2833MHz (333x8.5) (64-bit quad-pumped bus) ?v | Socket 775 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process (2) 107mm² die |
Xeon X3370 MMX SSE SSE2 SSE3 SSE4 (Yorkfield) (quad core (dual die), EM64T, NX bit, VT) August 11, 2008 - {$530} | 775 balls 3000MHz (333x9) (64-bit quad-pumped bus) ?v | Socket 775 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process (2) 107mm² die |
Xeon X3380 MMX SSE SSE2 SSE3 SSE4 (Yorkfield) (quad core (dual die), EM64T, NX bit, VT) February, 2009 - {$530} | 775 balls 3166MHz (333x9.5) (64-bit quad-pumped bus) ?v | Socket 775 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process (2) 107mm² die |
Xeon (Socket 771) | ||||
---|---|---|---|---|
Intel Processors | Natural State | Sockets | L1/L2 Cache (Associativity) | Transistors |
Xeon 5020 MMX SSE SSE2 SSE3 (Dempsey) (dual die, Jackson Hyperthreading, EM64T, NX bit) | 771 balls 2500MHz (166x15) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 16KB data (8-way) 2x 12k µops trace instruction (8-way) 2x 2MB on-Die unified L2 (8-way) | 230 million 0.065µm process (2) 103mm² die |
Xeon 5030 MMX SSE SSE2 SSE3 (Dempsey) (dual die, Jackson Hyperthreading, EM64T, NX bit, VT) May 23, 2006 | 771 balls 2666MHz (166x16) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 16KB data (8-way) 2x 12k µops trace instruction (8-way) 2x 2MB on-Die unified L2 (8-way) | 230 million 0.065µm process (2) 103mm² die |
Xeon 5040 MMX SSE SSE2 SSE3 (Dempsey) (dual die, Jackson Hyperthreading, EM64T, NX bit) | 771 balls 2833MHz (166x17) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 16KB data (8-way) 2x 12k µops trace instruction (8-way) 2x 2MB on-Die unified L2 (8-way) | 230 million 0.065µm process (2) 103mm² die |
Xeon 5050 MMX SSE SSE2 SSE3 (Dempsey) (dual die, Jackson Hyperthreading, EM64T, NX bit, VT) May 23, 2006 | 771 balls 3000MHz (166x18) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 16KB data (8-way) 2x 12k µops trace instruction (8-way) 2x 2MB on-Die unified L2 (8-way) | 230 million 0.065µm process (2) 103mm² die |
Xeon 5060 MMX SSE SSE2 SSE3 (Dempsey) (dual die, Jackson Hyperthreading, EM64T, NX bit, VT) May 23, 2006 | 771 balls 3200MHz (266x12) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 16KB data (8-way) 2x 12k µops trace instruction (8-way) 2x 2MB on-Die unified L2 (8-way) | 230 million 0.065µm process (2) 103mm² die |
Xeon 5063 MMX SSE SSE2 SSE3 (Dempsey) (dual die, Jackson Hyperthreading, EM64T, NX bit, VT) May 23, 2006 | 771 balls 3200MHz (266x12) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 16KB data (8-way) 2x 12k µops trace instruction (8-way) 2x 2MB on-Die unified L2 (8-way) | 230 million 0.065µm process (2) 103mm² die |
Xeon 5070 MMX SSE SSE2 SSE3 (Dempsey) (dual die, Jackson Hyperthreading, EM64T, NX bit) | 771 balls 3466MHz (266x13) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 16KB data (8-way) 2x 12k µops trace instruction (8-way) 2x 2MB on-Die unified L2 (8-way) | 230 million 0.065µm process (2) 103mm² die |
Xeon 5080 MMX SSE SSE2 SSE3 (Dempsey) (dual die, Jackson Hyperthreading, EM64T, NX bit, VT) May 23, 2006 | 771 balls 3733MHz (266x14) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 16KB data (8-way) 2x 12k µops trace instruction (8-way) 2x 2MB on-Die unified L2 (8-way) | 230 million 0.065µm process (2) 103mm² die |
Xeon LV 5128 MMX SSE SSE2 SSE3 (Woodcrest) (dual core, EM64T, NX bit, VT) December 1, 2006 | 771 balls 1866MHz (266x7) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-Die shared L2 (16-way) | 291 million 0.065µm process 143mm² die |
Xeon LV 5138 MMX SSE SSE2 SSE3 (Woodcrest) (dual core, EM64T, NX bit, VT) December 1, 2006 | 771 balls 2133MHz (266x8) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-Die shared L2 (16-way) | 291 million 0.065µm process 143mm² die |
Xeon LV 5148 MMX SSE SSE2 SSE3 (Woodcrest) (dual core, EM64T, NX bit, VT) June 26, 2006 | 771 balls 2333MHz (333x7) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-Die shared L2 (16-way) | 291 million 0.065µm process 143mm² die |
Xeon 5110 MMX SSE SSE2 SSE3 (Woodcrest) (dual core, EM64T, NX bit, VT) June 26, 2006 | 771 balls 1600MHz (266x6) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-Die shared L2 (16-way) | 291 million 0.065µm process 143mm² die |
Xeon 5120 MMX SSE SSE2 SSE3 (Woodcrest) (dual core, EM64T, NX bit, VT) June 26, 2006 | 771 balls 1866MHz (266x7) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-Die shared L2 (16-way) | 291 million 0.065µm process 143mm² die |
Xeon 5130 MMX SSE SSE2 SSE3 (Woodcrest) (dual core, EM64T, NX bit, VT) June 26, 2006 | 771 balls 2000MHz (333x6) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-Die shared L2 (16-way) | 291 million 0.065µm process 143mm² die |
Xeon 5140 MMX SSE SSE2 SSE3 (Woodcrest) (dual core, EM64T, NX bit, VT) June 26, 2006 | 771 balls 2333MHz (333x7) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-Die shared L2 (16-way) | 291 million 0.065µm process 143mm² die |
Xeon 5150 MMX SSE SSE2 SSE3 (Woodcrest) (dual core, EM64T, NX bit, VT) June 26, 2006 | 771 balls 2666MHz (333x8) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-Die shared L2 (16-way) | 291 million 0.065µm process 143mm² die |
Xeon 5160 MMX SSE SSE2 SSE3 (Woodcrest) (dual core, EM64T, NX bit, VT) June 26, 2006 | 771 balls 3000MHz (333x9) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-Die shared L2 (16-way) | 291 million 0.065µm process 143mm² die |
Xeon L5215 MMX SSE SSE2 SSE3 SSE4 (Wolfdale) (dual core, EM64T, NX bit, VT) August, 2008 | 771 balls ?MHz (?x?) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 6MB on-Die shared L2 (24-way) | 410 million 0.045µm process 107mm² die |
Xeon L5238 MMX SSE SSE2 SSE3 SSE4 (Wolfdale) (dual core, EM64T, NX bit, VT) February 27, 2008 | 771 balls 2666MHz (333x8) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 6MB on-Die shared L2 (24-way) | 410 million 0.045µm process 107mm² die |
Xeon L5240 MMX SSE SSE2 SSE3 SSE4 (Wolfdale) (dual core, EM64T, NX bit, VT) 2008 | 771 balls 3000MHz (333x9) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 6MB on-Die shared L2 (24-way) | 410 million 0.045µm process 107mm² die |
Xeon L5248 MMX SSE SSE2 SSE3 SSE4 (Wolfdale) (dual core, EM64T, NX bit, VT) ??? | 771 balls 3000MHz (333x9) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 6MB on-Die shared L2 (24-way) | 410 million 0.045µm process 107mm² die |
Xeon E5205 MMX SSE SSE2 SSE3 SSE4 (Wolfdale) (dual core, EM64T, NX bit, VT) November 11, 2007 - {$177} | 771 balls 1866MHz (266x7) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 6MB on-Die shared L2 (24-way) | 410 million 0.045µm process 107mm² die |
Xeon E5220 MMX SSE SSE2 SSE3 SSE4 (Wolfdale) (dual core, EM64T, NX bit, VT) February 27, 2008 | 771 balls 2333MHz (333x7) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 6MB on-Die shared L2 (24-way) | 410 million 0.045µm process 107mm² die |
Xeon E5240 MMX SSE SSE2 SSE3 SSE4 (Wolfdale) (dual core, EM64T, NX bit, VT) February 27, 2008 | 771 balls 3000MHz (333x9) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 6MB on-Die shared L2 (24-way) | 410 million 0.045µm process 107mm² die |
Xeon X5260 MMX SSE SSE2 SSE3 SSE4 (Wolfdale) (dual core, EM64T, NX bit, VT) November 11, 2007 - {$851} | 771 balls 3333MHz (333x10) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 6MB on-Die shared L2 (24-way) | 410 million 0.045µm process 107mm² die |
Xeon X5270 MMX SSE SSE2 SSE3 SSE4 (Wolfdale) (dual core, EM64T, NX bit, VT) September 8, 2008 - {$1172} | 771 balls 3500MHz (333x10.5) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 6MB on-Die shared L2 (24-way) | 410 million 0.045µm process 107mm² die |
Xeon X5272 MMX SSE SSE2 SSE3 SSE4 (Wolfdale) (dual core, EM64T, NX bit, VT) November 11, 2007 - {$1172} | 771 balls 3400MHz (400x8.5) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 6MB on-Die shared L2 (24-way) | 410 million 0.045µm process 107mm² die |
Xeon L5310 MMX SSE SSE2 SSE3 (Clovertown) (quad core (dual die), EM64T, NX bit) March 12, 2006 - {$455} | 771 balls 1600MHz (266x6) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB on-Die shared L2 (16-way) | 582 million 0.065µm process (2) 142mm² die |
Xeon L5318 MMX SSE SSE2 SSE3 (Clovertown) (quad core (dual die), EM64T, NX bit) September 5, 2007 | 771 balls 1600MHz (266x6) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB on-Die shared L2 (16-way) | 582 million 0.065µm process (2) 142mm² die |
Xeon L5320 MMX SSE SSE2 SSE3 (Clovertown) (quad core (dual die), EM64T, NX bit) March 12, 2007 - {$519} | 771 balls 1866MHz (266x7) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB on-Die shared L2 (16-way) | 582 million 0.065µm process (2) 142mm² die |
Xeon L5335 MMX SSE SSE2 SSE3 (Clovertown) (quad core (dual die), EM64T, NX bit, VT) August 13, 2007 - {$380} | 771 balls 2000MHz (333x6) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB on-Die shared L2 (16-way) | 582 million 0.065µm process (2) 142mm² die |
Xeon E5310 MMX SSE SSE2 SSE3 (Clovertown) (quad core (dual die), EM64T, NX bit) November 27, 2006 - {$455} | 771 balls 1600MHz (266x6) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB on-Die shared L2 (16-way) | 582 million 0.065µm process (2) 142mm² die |
Xeon E5320 MMX SSE SSE2 SSE3 (Clovertown) (quad core (dual die), EM64T, NX bit) November 27, 2006 - {$690} | 771 balls 1866MHz (266x7) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB on-Die shared L2 (16-way) | 582 million 0.065µm process (2) 142mm² die |
Xeon E5335 MMX SSE SSE2 SSE3 (Clovertown) (quad core (dual die), EM64T, NX bit) 4Q 2006 | 771 balls 2000MHz (333x6) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB on-Die shared L2 (16-way) | 582 million 0.065µm process (2) 142mm² die |
Xeon E5345 MMX SSE SSE2 SSE3 (Clovertown) (quad core (dual die), EM64T) November 27, 2006 - {$851} | 771 balls 2333MHz (333x7) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB on-Die shared L2 (16-way) | 582 million 0.065µm process (2) 142mm² die |
Xeon X5355 MMX SSE SSE2 SSE3 (Clovertown) (quad core (dual die), EM64T) November 27, 2006 - {$1172} | 771 balls 2666MHz (333x8) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB on-Die shared L2 (16-way) | 582 million 0.065µm process (2) 142mm² die |
Xeon X5365 MMX SSE SSE2 SSE3 (Clovertown) (quad core (dual die), EM64T) August 13, 2007 - {$1172} | 771 balls 3000MHz (333x9) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB on-Die shared L2 (16-way) | 582 million 0.065µm process (2) 142mm² die |
Xeon L5408 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) February 27, 2008 | 771 balls 2133MHz (266x8) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process (2) 107mm² die |
Xeon L5410 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) March 25, 2008 - {$320} | 771 balls 2333MHz (333x7) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process (2) 107mm² die |
Xeon L5420 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) March 25, 2008 - {$380} | 771 balls 2500MHz (333x7.5) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process (2) 107mm² die |
Xeon L5430 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) September 8, 2008 - {$562} | 771 balls 2666MHz (333x8) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process (2) 107mm² die |
Xeon E5405 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) November 11, 2007 - {$209} | 771 balls 2000MHz (333x6) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process (2) 107mm² die |
Xeon E5410 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) November 11, 2007 - {$256} | 771 balls 2333MHz (333x7) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process (2) 107mm² die |
Xeon E5420 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) November 11, 2007 - {$316} | 771 balls 2500MHz (333x7.5) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process (2) 107mm² die |
Xeon E5430 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) November 11, 2007 - {$455} | 771 balls 2666MHz (333x8) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process (2) 107mm² die |
Xeon E5440 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) November 11, 2007 - {$690} | 771 balls 2833MHz (333x8.5) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process (2) 107mm² die |
Xeon E5450 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) November 11, 2007 - {$915} | 771 balls 3000MHz (333x9) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process (2) 107mm² die |
Xeon E5462 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) November 11, 2007 - {$797} | 771 balls 2800MHz (400x7) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process (2) 107mm² die |
Xeon E5472 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) November 11, 2007 - {$1022} | 771 balls 3000MHz (400x7.5) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process (2) 107mm² die |
Xeon X5450 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) November 11, 2007 - {$851} | 771 balls 3000MHz (333x9) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process (2) 107mm² die |
Xeon X5460 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) November 11, 2007 - {$1172} | 771 balls 3166MHz (333x9.5) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process (2) 107mm² die |
Xeon X5470 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) September 8, 2008 - {$1386} | 771 balls 3333MHz (333x10) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process (2) 107mm² die |
Xeon X5472 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) November 11, 2007 - {$958} | 771 balls 3000MHz (400x7.5) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process (2) 107mm² die |
Xeon X5482 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) November 11, 2007 - {$1279} | 771 balls 3200MHz (400x8) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process (2) 107mm² die |
Xeon X5492 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) September 8, 2008 - {$1493} | 771 balls 3400MHz (400x8.5) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process (2) 107mm² die |
Xeon | ||||
---|---|---|---|---|
Intel Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
(Whitefield) (quad core, 1xQPI, EM64T, NX bit, VT) [cancelled] | ? balls ?MHz (?x?) (64-bit QPI) ?v | Socket ? | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 8x 2MB on-Die shared L2 (8-way) | ? million 0.065µm process ?mm² die |
Xeon (Socket 604) | ||||
---|---|---|---|---|
Intel Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
Xeon MP L7345 MMX SSE SSE2 SSE3 (Tigerton) (quad core (dual die), EM64T, NX bit, VT) September 5, 2007 - {$2301} | 1866MHz (266x7) (64-bit quad-pumped bus) ?v | Socket 604 | 4x 32KB instruction (8-way) 2x 4MB on-Die unified L2 (16-way) | 0.065µm process (2) 142mm² die |
Xeon MP E7210 MMX SSE SSE2 SSE3 (Tigerton) (dual core (dual die), EM64T, NX bit, VT) September 5, 2007 - {$1980} | 604 pins 2400MHz (266x9) (64-bit quad-pumped bus) ?v | Socket 604 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 2x 4MB on-Die unified L2 (16-way) | 582 million 0.065µm process (2) 142mm² die |
Xeon MP E7220 MMX SSE SSE2 SSE3 (Tigerton) (dual core (dual die), EM64T, NX bit, VT) September 5, 2007 - {$1980} | 604 pins 2933MHz (266x11) (64-bit quad-pumped bus) ?v | Socket 604 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 2x 4MB on-Die unified L2 (16-way) | 582 million 0.065µm process (2) 142mm² die |
Xeon MP E7310 MMX SSE SSE2 SSE3 (Tigerton) (quad core (dual die), EM64T, NX bit, VT) September 5, 2007 - {$856} | 604 pins 1600MHz (266x6) (64-bit quad-pumped bus) ?v | Socket 604 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 2MB on-Die unified L2 (8-way) | 582 million 0.065µm process (2) 142mm² die |
Xeon MP E7320 MMX SSE SSE2 SSE3 (Tigerton) (quad core (dual die), EM64T, NX bit, VT) September 5, 2007 - {$856} | 604 pins 2133MHz (266x8) (64-bit quad-pumped bus) ?v | Socket 604 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 2MB on-Die unified L2 (8-way) | 582 million 0.065µm process (2) 142mm² die |
Xeon MP E7330 MMX SSE SSE2 SSE3 (Tigerton) (quad core (dual die), EM64T, NX bit, VT) September 5, 2007 - {$856} | 604 pins 2400MHz (266x9) (64-bit quad-pumped bus) ?v | Socket 604 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 3MB on-Die unified L2 (12-way) | 582 million 0.065µm process (2) 142mm² die |
Xeon MP E7340 MMX SSE SSE2 SSE3 (Tigerton) (quad core (dual die), EM64T, NX bit, VT) September 5, 2007 - {$856} | 604 pins 2400MHz (266x9) (64-bit quad-pumped bus) ?v | Socket 604 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB on-Die unified L2 (16-way) | 582 million 0.065µm process (2) 142mm² die |
Xeon MP X7350 MMX SSE SSE2 SSE3 (Tigerton) (quad core (dual die), EM64T, NX bit, VT) September 5, 2007 - {$2301} | 604 pins 2933MHz (266x11) (64-bit quad-pumped bus) ?v | Socket 604 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB on-Die unified L2 (16-way) | 582 million 0.065µm process (2) 142mm² die |
Xeon L7445 MMX SSE SSE2 SSE3 SSE4 (Dunnington) (quad core, EM64T, NX bit, VT) September 15, 2008 - {$1980} | 604 pins 2133MHz (266x8) (64-bit quad-pumped bus) ?v | Socket 604 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 3MB on-Die shared L2 (12-way) 12MB on-Die shared L3 (16-way) | 1900 million 0.045µm process 503mm² die |
Xeon L7455 MMX SSE SSE2 SSE3 SSE4 (Dunnington) (six cores, EM64T, NX bit, VT) September 15, 2008 - {$2729} | 604 pins 2133MHz (266x8) (64-bit quad-pumped bus) ?v | Socket 604 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 3x 3MB on-Die shared L2 (12-way) 12MB on-Die shared L3 (16-way) | 1900 million 0.045µm process 503mm² die |
Xeon E7420 MMX SSE SSE2 SSE3 SSE4 (Dunnington) (quad core, EM64T, NX bit, VT) September 15, 2008 - {$1177} | 604 pins 2133MHz (266x8) (64-bit quad-pumped bus) ?v | Socket 604 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 3MB on-Die shared L2 (12-way) 8MB on-Die shared L3 (16-way) | 1900 million 0.045µm process 503mm² die |
Xeon E7430 MMX SSE SSE2 SSE3 SSE4 (Dunnington) (quad core, EM64T, NX bit, VT) September 15, 2008 - {$1391} | 604 pins 2133MHz (266x8) (64-bit quad-pumped bus) ?v | Socket 604 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 3MB on-Die shared L2 (12-way) 12MB on-Die shared L3 (16-way) | 1900 million 0.045µm process 503mm² die |
Xeon E7440 MMX SSE SSE2 SSE3 SSE4 (Dunnington) (quad core, EM64T, NX bit, VT) September 15, 2008 - {$1980} | 604 pins 2400MHz (266x9) (64-bit quad-pumped bus) ?v | Socket 604 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 3MB on-Die shared L2 (12-way) 16MB on-Die shared L3 (16-way) | 1900 million 0.045µm process 503mm² die |
Xeon E7450 MMX SSE SSE2 SSE3 SSE4 (Dunnington) (6 cores, EM64T, NX bit, VT) September 15, 2008 - {$2301} | 604 pins 2400MHz (266x9) (64-bit quad-pumped bus) ?v | Socket 604 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 3x 3MB on-Die shared L2 (12-way) 12MB on-Die shared L3 (16-way) | 1900 million 0.045µm process 503mm² die |
Xeon X7460 MMX SSE SSE2 SSE3 SSE4 (Dunnington) (6 cores, EM64T, NX bit, VT) September 15, 2008 - {$2729} | 604 pins 2666MHz (266x10) (64-bit quad-pumped bus) ?v | Socket 604 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 3x 3MB on-Die shared L2 (12-way) 16MB on-Die shared L3 (16-way) | 1900 million 0.045µm process 503mm² die |
Xeon (Nehalem) | ||||
---|---|---|---|---|
Intel Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
Xeon L3406 MMX SSE SSE2 SSE3 SSE4.2 (Clarkdale) 128-bit DDR3 on-Die unbuffered PC8500 mem controller (dual core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 15, 2010 - {$189} | 1156 balls 2266MHz (133x17) (2.53GHz Turbo) (64-bit bus) ?v | Socket 1156 | 2x 32KB data (8-way) 2x 32KB instruction (4-way) 2x 256KB on-Die unified L2 (8-way) 4MB on-Die shared L3 (16-way) | 383 million 0.032µm process 81mm² die |
Xeon L3426 MMX SSE SSE2 SSE3 SSE4.2 (Lynnfield) 128-bit DDR3 on-Die Registered PC10666 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT) September 8, 2009 - {$284} | 1156 balls 1866MHz (133x14) (3.2GHz Turbo) (64-bit bus) ?v | Socket 1156 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 774 million 0.045µm process 296mm² die |
Xeon X3430 MMX SSE SSE2 SSE3 SSE4.2 (Lynnfield) 128-bit DDR3 on-Die Registered PC10666 mem controller (quad core, EM64T, NX bit, VT, TXT) September 8, 2009 - {$189} | 1156 balls 2400MHz (133x18) (2.8GHz Turbo) (64-bit bus) ?v | Socket 1156 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 774 million 0.045µm process 296mm² die |
Xeon X3440 MMX SSE SSE2 SSE3 SSE4.2 (Lynnfield) 128-bit DDR3 on-Die Registered PC10666 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT) September 8, 2009 - {$215} | 1156 balls 2533MHz (133x19) (2.93GHz Turbo) (64-bit bus) ?v | Socket 1156 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 774 million 0.045µm process 296mm² die |
Xeon X3450 MMX SSE SSE2 SSE3 SSE4.2 (Lynnfield) 128-bit DDR3 on-Die Registered PC10666 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT) September 8, 2009 - {$241} | 1156 balls 2666MHz (133x20) (3.2GHz Turbo) (64-bit bus) ?v | Socket 1156 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 774 million 0.045µm process 296mm² die |
Xeon X3460 MMX SSE SSE2 SSE3 SSE4.2 (Lynnfield) 128-bit DDR3 on-Die Registered PC10666 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT) September 8, 2009 - {$316} | 1156 balls 2800MHz (133x21) (3.46GHz Turbo) (64-bit bus) ?v | Socket 1156 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 774 million 0.045µm process 296mm² die |
Xeon X3470 MMX SSE SSE2 SSE3 SSE4.2 (Lynnfield) 128-bit DDR3 on-Die Registered PC10666 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT) September 8, 2009 - {$589} | 1156 balls 2933MHz (133x22) (3.6GHz Turbo) (64-bit bus) ?v | Socket 1156 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 774 million 0.045µm process 296mm² die |
Xeon X3480 MMX SSE SSE2 SSE3 SSE4.2 (Lynnfield) 128-bit DDR3 on-Die Registered PC10666 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT) May 31, 2010 - {$612} | 1156 balls 3066MHz (133x23) (3.73GHz Turbo) (64-bit bus) ?v | Socket 1156 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 774 million 0.045µm process 296mm² die |
Intel Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
Xeon W3520 MMX SSE SSE2 SSE3 SSE4.2 (Bloomfield) 192-bit DDR3 on-Die unbuffered PC8500 mem controller (quad core, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 30, 2009 - {$284} | 1366 balls 2666MHz (133x20) (2.93GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 731 million 0.045µm process 263mm² die |
Xeon W3530 MMX SSE SSE2 SSE3 SSE4.2 (Bloomfield) 192-bit DDR3 on-Die unbuffered PC8500 mem controller (quad core, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 15, 2010 - {$294} | 1366 balls 2800MHz (133x21) (3.06GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 731 million 0.045µm process 263mm² die |
Xeon W3540 MMX SSE SSE2 SSE3 SSE4.2 (Bloomfield) 192-bit DDR3 on-Die unbuffered PC8500 mem controller (quad core, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 30, 2009 - {$562} | 1366 balls 2933MHz (133x22) (3.2GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 731 million 0.045µm process 263mm² die |
Xeon W3550 MMX SSE SSE2 SSE3 SSE4.2 (Bloomfield) 192-bit DDR3 on-Die unbuffered PC8500 mem controller (quad core, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 3Q 2009 - {$562} | 1366 balls 3066MHz (133x23) (3.33GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 731 million 0.045µm process 263mm² die |
Xeon W3565 MMX SSE SSE2 SSE3 SSE4.2 (Bloomfield) 192-bit DDR3 on-Die unbuffered PC8500 mem controller (quad core, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 4Q 2009 - {$562} | 1366 balls 3200MHz (133x24) (3.46GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 731 million 0.045µm process 263mm² die |
Xeon W3570 MMX SSE SSE2 SSE3 SSE4.2 (Bloomfield) 192-bit DDR3 on-Die unbuffered PC10666 mem controller (quad core, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 30, 2009 - {$999} | 1366 balls 3200MHz (133x24) (3.46GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 731 million 0.045µm process 263mm² die |
Xeon W3580 MMX SSE SSE2 SSE3 SSE4.2 (Bloomfield) 192-bit DDR3 on-Die unbuffered PC10666 mem controller (quad core, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 3Q 2009 - {$999} | 1366 balls 3333MHz (133x24) (3.6GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 731 million 0.045µm process 263mm² die |
Xeon W3670 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EP) 192-bit DDR3 on-Die Registered PC10666 mem controller (6 cores, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) August 30, 2010 - {$999} | 1366 balls 3200MHz (133x24) (3.46GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 6x 32KB data (8-way) 6x 32KB instruction (4-way) 6x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | 1170 million 0.032µm process 248mm² die |
Xeon W3680 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EP) 192-bit DDR3 on-Die Registered PC10666 mem controller (6 cores, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 15, 2010 - {$999} | 1366 balls 3333MHz (133x25) (3.6GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 6x 32KB data (8-way) 6x 32KB instruction (4-way) 6x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | 1170 million 0.032µm process 248mm² die |
Xeon L5506 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC6400 mem controller (quad core, 2xQPI, EM64T, NX bit, VT) March 30, 2009 - {$423} | 1366 balls 2133MHz (133x16) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 4MB on-Die shared L3 (16-way) | 731 million 0.045µm process 263mm² die |
Xeon L5508 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC8500 mem controller (dual core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT) March 30, 2009 - {$?} | 1366 balls 2000MHz (133x15) (64-bit QPI) ?v | Socket 1366 | 2x 32KB data (8-way) 2x 32KB instruction (4-way) 2x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 731 million 0.045µm process 263mm² die |
Xeon L5518 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC8500 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 30, 2009 - {$?} | 1366 balls 2133MHz (133x16) (2.4GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 731 million 0.045µm process 263mm² die |
Xeon L5520 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC8500 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 30, 2009 - {$530} | 1366 balls 2266MHz (133x17) (2.4GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 731 million 0.045µm process 263mm² die |
Xeon L5530 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC8500 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 3Q, 2009 - {$744} | 1366 balls 2400MHz (133x18) (2.66GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 731 million 0.045µm process 263mm² die |
Xeon E5502 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC6400 mem controller (dual core, 2xQPI, EM64T, NX bit, VT) March 30, 2009 - {$188} | 1366 balls 1866MHz (133x14) (64-bit QPI) ?v | Socket 1366 | 2x 32KB data (8-way) 2x 32KB instruction (4-way) 2x 256KB on-Die unified L2 (8-way) 4MB on-Die shared L3 (16-way) | 731 million 0.045µm process 263mm² die |
Xeon E5503 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC6400 mem controller (dual core, 2xQPI, EM64T, NX bit, VT) March 15, 2010 - {$188} | 1366 balls 2000MHz (133x15) (64-bit QPI) ?v | Socket 1366 | 2x 32KB data (8-way) 2x 32KB instruction (4-way) 2x 256KB on-Die unified L2 (8-way) 4MB on-Die shared L3 (16-way) | 731 million 0.045µm process 263mm² die |
Xeon E5504 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC6400 mem controller (quad core, 2xQPI, EM64T, NX bit, VT) March 30, 2009 - {$224} | 1366 balls 2000MHz (133x15) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 4MB on-Die shared L3 (16-way) | 731 million 0.045µm process 263mm² die |
Xeon E5506 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC6400 mem controller (quad core, 2xQPI, EM64T, NX bit, VT) March 30, 2009 - {$266} | 1366 balls 2133MHz (133x16) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 4MB on-Die shared L3 (16-way) | 731 million 0.045µm process 263mm² die |
Xeon E5507 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC6400 mem controller (quad core, 2xQPI, EM64T, NX bit, VT) March 15, 2010 - {$276} | 1366 balls 2266MHz (133x17) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 4MB on-Die shared L3 (16-way) | 731 million 0.045µm process 263mm² die |
Xeon E5520 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC8500 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 30, 2009 - {$373} | 1366 balls 2266MHz (133x17) (2.53GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 731 million 0.045µm process 263mm² die |
Xeon E5530 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC8500 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 30, 2009 - {$530} | 1366 balls 2400MHz (133x18) (2.66GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 731 million 0.045µm process 263mm² die |
Xeon E5540 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC8500 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 30, 2009 - {$744} | 1366 balls 2533MHz (133x19) (2.8GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 731 million 0.045µm process 263mm² die |
Xeon X5550 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC10666 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 30, 2009 - {$958} | 1366 balls 2666MHz (133x20) (3.06GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 731 million 0.045µm process 263mm² die |
Xeon X5560 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC10666 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 30, 2009 - {$1172} | 1366 balls 2800MHz (133x21) (3.2GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 731 million 0.045µm process 263mm² die |
Xeon X5570 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC10666 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 30, 2009 - {$1386} | 1366 balls 2933MHz (133x22) (3.33GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 731 million 0.045µm process 263mm² die |
Xeon W5580 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC10666 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 30, 2009 - {$1600} | 1366 balls 3200MHz (133x24) (3.46GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 731 million 0.045µm process 263mm² die |
Xeon W5590 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC10666 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 3Q, 2009 - {$1600} | 1366 balls 3333MHz (133x25) (3.6GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 731 million 0.045µm process 263mm² die |
Xeon L5609 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EP) 192-bit DDR3 on-Die Registered PC8500 mem controller (quad core, 2xQPI, EM64T, NX bit, VT) March 15, 2010 - {$440} | 1366 balls 1866MHz (133x14) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | 1170 million 0.032µm process 248mm² die |
Xeon L5618 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EP) 192-bit DDR3 on-Die Registered PC8500 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 15, 2010 - {$?} | 1366 balls 1866MHz (133x14) (2.26GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | 1170 million 0.032µm process 248mm² die |
Xeon L5630 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EP) 192-bit DDR3 on-Die Registered PC8500 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 15, 2010 - {$551} | 1366 balls 2133MHz (133x16) (2.4GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | 1170 million 0.032µm process 248mm² die |
Xeon L5638 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EP) 192-bit DDR3 on-Die Registered PC10666 mem controller (6 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 15, 2010 - {$?} | 1366 balls 2000MHz (133x15) (2.4GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 6x 32KB data (8-way) 6x 32KB instruction (4-way) 6x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | 1170 million 0.032µm process 248mm² die |
Xeon L5640 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EP) 192-bit DDR3 on-Die Registered PC10666 mem controller (6 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 15, 2010 - {$996} | 1366 balls 2266MHz (133x17) (2.8GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 6x 32KB data (8-way) 6x 32KB instruction (4-way) 6x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | 1170 million 0.032µm process 248mm² die |
Xeon E5603 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EP) 192-bit DDR3 on-Die Registered PC? mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) February 14, 2011 - {$188} | 1366 balls 1600MHz (133x12) (?GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 4MB on-Die shared L3 (?-way) | 1170 million 0.032µm process 248mm² die |
Xeon E5606 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EP) 192-bit DDR3 on-Die Registered PC? mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) February 14, 2011 - {$219} | 1366 balls 2133MHz (133x16) (?GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | 1170 million 0.032µm process 248mm² die |
Xeon E5607 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EP) 192-bit DDR3 on-Die Registered PC? mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) February 14, 2011 - {$276} | 1366 balls 2266MHz (133x17) (?GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | 1170 million 0.032µm process 248mm² die |
Xeon E5620 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EP) 192-bit DDR3 on-Die Registered PC8500 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 15, 2010 - {$387} | 1366 balls 2400MHz (133x18) (2.66GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | 1170 million 0.032µm process 248mm² die |
Xeon E5630 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EP) 192-bit DDR3 on-Die Registered PC8500 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 15, 2010 - {$551} | 1366 balls 2533MHz (133x19) (2.8GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | 1170 million 0.032µm process 248mm² die |
Xeon E5640 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EP) 192-bit DDR3 on-Die Registered PC8500 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 15, 2010 - {$774} | 1366 balls 2666MHz (133x20) (2.93GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | 1170 million 0.032µm process 248mm² die |
Xeon E5645 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EP) 192-bit DDR3 on-Die Registered PC10666 mem controller (6 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 15, 2010 - {$?} | 1366 balls 2400MHz (133x18) (2.8GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 6x 32KB data (8-way) 6x 32KB instruction (4-way) 6x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | 1170 million 0.032µm process 248mm² die |
Xeon E5649 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EP) 192-bit DDR3 on-Die Registered PC10666 mem controller (6 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) February 14, 2011 - {$774} | 1366 balls 2533MHz (133x19) (?GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 6x 32KB data (8-way) 6x 32KB instruction (4-way) 6x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | 1170 million 0.032µm process 248mm² die |
Xeon X5647 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EP) 192-bit DDR3 on-Die Registered PC10666 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) February 14,, 2011 - {$774} | 1366 balls 2933MHz (133x22) (?GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | 1170 million 0.032µm process 248mm² die |
Xeon X5650 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EP) 192-bit DDR3 on-Die Registered PC10666 mem controller (6 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 15, 2010 - {$996} | 1366 balls 2666MHz (133x20) (3.06GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 6x 32KB data (8-way) 6x 32KB instruction (4-way) 6x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | 1170 million 0.032µm process 248mm² die |
Xeon X5660 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EP) 192-bit DDR3 on-Die Registered PC10666 mem controller (6 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 15, 2010 - {$1219} | 1366 balls 2800MHz (133x21) (3.2GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 6x 32KB data (8-way) 6x 32KB instruction (4-way) 6x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | 1170 million 0.032µm process 248mm² die |
Xeon X5667 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EP) 192-bit DDR3 on-Die Registered PC10666 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 15, 2010 - {$1219} | 1366 balls 3066MHz (133x23) (3.46GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | 1170 million 0.032µm process 248mm² die |
Xeon X5670 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EP) 192-bit DDR3 on-Die Registered PC10666 mem controller (6 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 15, 2010 - {$1440} | 1366 balls 2933MHz (133x22) (3.33GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 6x 32KB data (8-way) 6x 32KB instruction (4-way) 6x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | 1170 million 0.032µm process 248mm² die |
Xeon X5672 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EP) 192-bit DDR3 on-Die Registered PC10666 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) February 14,, 2011 - {$1440} | 1366 balls 3200MHz (133x24) (?GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | 1170 million 0.032µm process 248mm² die |
Xeon X5675 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EP) 192-bit DDR3 on-Die Registered PC10666 mem controller (6 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) February 14, 2011 - {$1440} | 1366 balls 3066MHz (133x23) (?GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 6x 32KB data (8-way) 6x 32KB instruction (4-way) 6x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | 1170 million 0.032µm process 248mm² die |
Xeon X5677 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EP) 192-bit DDR3 on-Die Registered PC10666 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 15, 2010 - {$1663} | 1366 balls 3466MHz (133x26) (3.733GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | 1170 million 0.032µm process 248mm² die |
Xeon X5680 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EP) 192-bit DDR3 on-Die Registered PC10666 mem controller (6 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 15, 2010 - {$1663} | 1366 balls 3333MHz (133x25) (3.6GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 6x 32KB data (8-way) 6x 32KB instruction (4-way) 6x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | 1170 million 0.032µm process 248mm² die |
Xeon X5687 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EP) 192-bit DDR3 on-Die Registered PC10666 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) February 14,, 2011 - {$1633} | 1366 balls 3600MHz (133x27) (?GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | 1170 million 0.032µm process 248mm² die |
Xeon X5690 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EP) 192-bit DDR3 on-Die Registered PC10666 mem controller (6 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) February 14, 2011 - {$1663} | 1366 balls 3466MHz (133x26) (?GHz Turbo) (64-bit QPI) ?v | Socket 1366 | 6x 32KB data (8-way) 6x 32KB instruction (4-way) 6x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | 1170 million 0.032µm process 248mm² die |
Intel Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
Xeon DP E6510 MMX SSE SSE2 SSE3 SSE4.2 (Nehalem-EX, Beckton) 256-bit DDR3 on-Die Registered PC8500 mem controller (quad core, 4xQPI, SMT Hyperthreading, EM64T, NX bit, VT) March 31, 2010 - {$744} | 1567 balls 1733MHz (133x13) (64-bit QPI) ?v | Socket LS | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 2x 6MB on-Die shared L3 (?-way) | 2300 million 0.045µm process 684mm² die |
Xeon DP E6540 MMX SSE SSE2 SSE3 SSE4.2 (Nehalem-EX, Beckton) 256-bit DDR3 on-Die Registered PC8500 mem controller (6-cores, 4xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 31, 2010 - {$1712} | 1567 balls 2000MHz (133x15) (2.26GHz Turbo) (64-bit QPI) ?v | Socket LS | 6x 32KB data (8-way) 6x 32KB instruction (4-way) 6x 256KB on-Die unified L2 (8-way) 2x 9MB on-Die shared L3 (?-way) | 2300 million 0.045µm process 684mm² die |
Xeon DP X6550 MMX SSE SSE2 SSE3 SSE4.2 (Nehalem-EX, Beckton) 256-bit DDR3 on-Die Registered PC8500 mem controller (8-cores, 4xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 31, 2010 - {$2461} | 1567 balls 2000MHz (133x15) (2.4GHz Turbo) (64-bit QPI) ?v | Socket LS | 8x 32KB data (8-way) 8x 32KB instruction (4-way) 8x 256KB on-Die unified L2 (8-way) 2x 9MB on-Die shared L3 (?-way) | 2300 million 0.045µm process 684mm² die |
Xeon MP E7520 MMX SSE SSE2 SSE3 SSE4.2 (Nehalem-EX, Beckton) 256-bit DDR3 on-Die Registered PC8500 mem controller (quad core, 4xQPI, SMT Hyperthreading, EM64T, NX bit, VT) March 31, 2010 - {$856} | 1567 balls 1866MHz (133x14) (64-bit QPI) ?v | Socket LS | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 2x 9MB on-Die shared L3 (?-way) | 2300 million 0.045µm process 684mm² die |
Xeon MP E7530 MMX SSE SSE2 SSE3 SSE4.2 (Nehalem-EX, Beckton) 256-bit DDR3 on-Die Registered PC8500 mem controller (6 cores, 4xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 31, 2010 - {$1391} | 1567 balls 1866MHz (133x14) (2.13GHz Turbo) (64-bit QPI) ?v | Socket LS | 6x 32KB data (8-way) 6x 32KB instruction (4-way) 6x 256KB on-Die unified L2 (8-way) 2x 6MB on-Die shared L3 (?-way) | 2300 million 0.045µm process 684mm² die |
Xeon MP E7540 MMX SSE SSE2 SSE3 SSE4.2 (Nehalem-EX, Beckton) 256-bit DDR3 on-Die Registered PC8500 mem controller (6 cores, 4xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 31, 2010 - {$1980} | 1567 balls 2000MHz (133x15) (2.26GHz Turbo) (64-bit QPI) ?v | Socket LS | 6x 32KB data (8-way) 6x 32KB instruction (4-way) 6x 256KB on-Die unified L2 (8-way) 2x 9MB on-Die shared L3 (?-way) | 2300 million 0.045µm process 684mm² die |
Xeon MP L7545 MMX SSE SSE2 SSE3 SSE4.2 (Nehalem-EX, Beckton) 256-bit DDR3 on-Die Registered PC8500 mem controller (6 cores, 4xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 31, 2010 - {$2087} | 1567 balls 1866MHz (133x14) (2.53GHz Turbo) (64-bit QPI) ?v | Socket LS | 6x 32KB data (8-way) 6x 32KB instruction (4-way) 6x 256KB on-Die unified L2 (8-way) 2x 9MB on-Die shared L3 (?-way) | 2300 million 0.045µm process 684mm² die |
Xeon MP L7555 MMX SSE SSE2 SSE3 SSE4.2 (Nehalem-EX, Beckton) 256-bit DDR3 on-Die Registered PC8500 mem controller (8 cores, 4xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 31, 2010 - {$3157} | 1567 balls 1866MHz (133x14) (2.53GHz Turbo) (64-bit QPI) ?v | Socket LS | 8x 32KB data (8-way) 8x 32KB instruction (4-way) 8x 256KB on-Die unified L2 (8-way) 2x 12MB on-Die shared L3 (?-way) | 2300 million 0.045µm process 684mm² die |
Xeon MP X7542 MMX SSE SSE2 SSE3 SSE4.2 (Nehalem-EX, Beckton) 256-bit DDR3 on-Die Registered PC8500 mem controller (6 cores, 4xQPI, EM64T, NX bit, VT, Turbo) March 31, 2010 - {$1980} | 1567 balls 2666MHz (133x20) (2.8GHz Turbo) (64-bit QPI) ?v | Socket LS | 6x 32KB data (8-way) 6x 32KB instruction (4-way) 6x 256KB on-Die unified L2 (8-way) 2x 9MB on-Die shared L3 (?-way) | 2300 million 0.045µm process 684mm² die |
Xeon MP X7550 MMX SSE SSE2 SSE3 SSE4.2 (Nehalem-EX, Beckton) 256-bit DDR3 on-Die Registered PC8500 mem controller (8 cores, 4xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 31, 2010 - {$2729} | 1567 balls 2000MHz (133x15) (2.4GHz Turbo) (64-bit QPI) ?v | Socket LS | 8x 32KB data (8-way) 8x 32KB instruction (4-way) 8x 256KB on-Die unified L2 (8-way) 2x 9MB on-Die shared L3 (?-way) | 2300 million 0.045µm process 684mm² die |
Xeon MP X7560 MMX SSE SSE2 SSE3 SSE4.2 (Nehalem-EX, Beckton) 256-bit DDR3 on-Die Registered PC8500 mem controller (8 cores, 4xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) March 31, 2010 - {$3692} | 1567 balls 2266MHz (133x17) (2.66GHz Turbo) (64-bit QPI) ?v | Socket LS | 8x 32KB data (8-way) 8x 32KB instruction (4-way) 8x 256KB on-Die unified L2 (8-way) 2x 9MB on-Die shared L3 (?-way) | 2300 million 0.045µm process 684mm² die |
Xeon E7-2803 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EX, Eagleton) 256-bit DDR3 on-Die Registered PC10666 mem controller (6 cores, 4xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT) April 6, 2011 - {$774} | 1567 balls 1733MHz (133x13) (64-bit QPI) ?v | Socket LS | 6x 32KB data (?-way) 6x 32KB instruction (?-way) 6x 256KB on-Die unified L2 (?-way) 18MB on-Die shared L3 (?-way) | 2600 million 0.032µm process 513mm² die |
Xeon E7-2820 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EX, Eagleton) 256-bit DDR3 on-Die Registered PC10666 mem controller (8 cores, 4xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 6, 2011 - {$1334} | 1567 balls 2000MHz (133x15) (2.26GHz Turbo) (64-bit QPI) ?v | Socket LS | 8x 32KB data (?-way) 8x 32KB instruction (?-way) 8x 256KB on-Die unified L2 (?-way) 18MB on-Die shared L3 (?-way) | 2600 million 0.032µm process 513mm² die |
Xeon E7-2830 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EX, Eagleton) 256-bit DDR3 on-Die Registered PC10666 mem controller (8 cores, 4xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 6, 2011 - {$1779} | 1567 balls 2133MHz (133x16) (2.4GHz Turbo) (64-bit QPI) ?v | Socket LS | 8x 32KB data (?-way) 8x 32KB instruction (?-way) 8x 256KB on-Die unified L2 (?-way) 24MB on-Die shared L3 (?-way) | 2600 million 0.032µm process 513mm² die |
Xeon E7-2850 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EX, Eagleton) 256-bit DDR3 on-Die Registered PC10666 mem controller (10 cores, 4xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 6, 2011 - {$2558} | 1567 balls 2000MHz (133x15) (2.4GHz Turbo) (64-bit QPI) ?v | Socket LS | 10x 32KB data (?-way) 10x 32KB instruction (?-way) 10x 256KB on-Die unified L2 (?-way) 24MB on-Die shared L3 (?-way) | 2600 million 0.032µm process 513mm² die |
Xeon E7-2860 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EX, Eagleton) 256-bit DDR3 on-Die Registered PC10666 mem controller (10 cores, 4xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 6, 2011 - {$3670} | 1567 balls 2266MHz (133x17) (2.66GHz Turbo) (64-bit QPI) ?v | Socket LS | 10x 32KB data (?-way) 10x 32KB instruction (?-way) 10x 256KB on-Die unified L2 (?-way) 24MB on-Die shared L3 (?-way) | 2600 million 0.032µm process 513mm² die |
Xeon E7-2870 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EX, Eagleton) 256-bit DDR3 on-Die Registered PC10666 mem controller (10 cores, 4xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 6, 2011 - {$4227} | 1567 balls 2400MHz (133x18) (2.8GHz Turbo) (64-bit QPI) ?v | Socket LS | 10x 32KB data (?-way) 10x 32KB instruction (?-way) 10x 256KB on-Die unified L2 (?-way) 30MB on-Die shared L3 (?-way) | 2600 million 0.032µm process 513mm² die |
Xeon E7-4807 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EX, Eagleton) 256-bit DDR3 on-Die Registered PC10666 mem controller (6 cores, 4xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT) April 6, 2011 - {$890} | 1567 balls 1866MHz (133x14) (64-bit QPI) ?v | Socket LS | 6x 32KB data (?-way) 6x 32KB instruction (?-way) 6x 256KB on-Die unified L2 (?-way) 18MB on-Die shared L3 (?-way) | 2600 million 0.032µm process 513mm² die |
Xeon E7-4820 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EX, Eagleton) 256-bit DDR3 on-Die Registered PC10666 mem controller (8 cores, 4xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 6, 2011 - {$1446} | 1567 balls 2000MHz (133x15) (2.26GHz Turbo) (64-bit QPI) ?v | Socket LS | 8x 32KB data (?-way) 8x 32KB instruction (?-way) 8x 256KB on-Die unified L2 (?-way) 18MB on-Die shared L3 (?-way) | 2600 million 0.032µm process 513mm² die |
Xeon E7-4830 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EX, Eagleton) 256-bit DDR3 on-Die Registered PC10666 mem controller (8 cores, 4xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 6, 2011 - {$2059} | 1567 balls 2133MHz (133x16) (2.4GHz Turbo) (64-bit QPI) ?v | Socket LS | 8x 32KB data (?-way) 8x 32KB instruction (?-way) 8x 256KB on-Die unified L2 (?-way) 24MB on-Die shared L3 (?-way) | 2600 million 0.032µm process 513mm² die |
Xeon E7-4850 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EX, Eagleton) 256-bit DDR3 on-Die Registered PC10666 mem controller (10 cores, 4xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 6, 2011 - {$2837} | 1567 balls 2000MHz (133x15) (2.4GHz Turbo) (64-bit QPI) ?v | Socket LS | 10x 32KB data (?-way) 10x 32KB instruction (?-way) 10x 256KB on-Die unified L2 (?-way) 24MB on-Die shared L3 (?-way) | 2600 million 0.032µm process 513mm² die |
Xeon E7-4860 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EX, Eagleton) 256-bit DDR3 on-Die Registered PC10666 mem controller (10 cores, 4xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 6, 2011 - {$3838} | 1567 balls 2266MHz (133x17) (2.66GHz Turbo) (64-bit QPI) ?v | Socket LS | 10x 32KB data (?-way) 10x 32KB instruction (?-way) 10x 256KB on-Die unified L2 (?-way) 24MB on-Die shared L3 (?-way) | 2600 million 0.032µm process 513mm² die |
Xeon E7-4870 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EX, Eagleton) 256-bit DDR3 on-Die Registered PC10666 mem controller (10 cores, 4xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 6, 2011 - {$4394} | 1567 balls 2400MHz (133x18) (2.8GHz Turbo) (64-bit QPI) ?v | Socket LS | 10x 32KB data (?-way) 10x 32KB instruction (?-way) 10x 256KB on-Die unified L2 (?-way) 30MB on-Die shared L3 (?-way) | 2600 million 0.032µm process 513mm² die |
Xeon E7-8830 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EX, Eagleton) 256-bit DDR3 on-Die Registered PC10666 mem controller (8 cores, 4xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 6, 2011 - {$2280} | 1567 balls 2133MHz (133x16) (2.4GHz Turbo) (64-bit QPI) ?v | Socket LS | 8x 32KB data (?-way) 8x 32KB instruction (?-way) 8x 256KB on-Die unified L2 (?-way) 24MB on-Die shared L3 (?-way) | 2600 million 0.032µm process 513mm² die |
Xeon E7-8837 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EX, Eagleton) 256-bit DDR3 on-Die Registered PC10666 mem controller (8 cores, 4xQPI, EM64T, NX bit, VT, TXT, Turbo) April 6, 2011 - {$2280} | 1567 balls 2666MHz (133x20) (2.8GHz Turbo) (64-bit QPI) ?v | Socket LS | 8x 32KB data (?-way) 8x 32KB instruction (?-way) 8x 256KB on-Die unified L2 (?-way) 24MB on-Die shared L3 (?-way) | 2600 million 0.032µm process 513mm² die |
Xeon E7-8850 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EX, Eagleton) 256-bit DDR3 on-Die Registered PC10666 mem controller (10 cores, 4xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 6, 2011 - {$3059} | 1567 balls 2000MHz (133x15) (2.4GHz Turbo) (64-bit QPI) ?v | Socket LS | 10x 32KB data (?-way) 10x 32KB instruction (?-way) 10x 256KB on-Die unified L2 (?-way) 24MB on-Die shared L3 (?-way) | 2600 million 0.032µm process 513mm² die |
Xeon E7-8860 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EX, Eagleton) 256-bit DDR3 on-Die Registered PC10666 mem controller (10 cores, 4xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 6, 2011 - {$4061} | 1567 balls 2266MHz (133x17) (2.66GHz Turbo) (64-bit QPI) ?v | Socket LS | 10x 32KB data (?-way) 10x 32KB instruction (?-way) 10x 256KB on-Die unified L2 (?-way) 24MB on-Die shared L3 (?-way) | 2600 million 0.032µm process 513mm² die |
Xeon E7-8867L MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EX, Eagleton) 256-bit DDR3 on-Die Registered PC10666 mem controller (10 cores, 4xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 6, 2011 - {$4061} | 1567 balls 2133MHz (133x16) (2.53GHz Turbo) (64-bit QPI) ?v | Socket LS | 10x 32KB data (?-way) 10x 32KB instruction (?-way) 10x 256KB on-Die unified L2 (?-way) 30MB on-Die shared L3 (?-way) | 2600 million 0.032µm process 513mm² die |
Xeon E7-8870 MMX SSE SSE2 SSE3 SSE4.2 (Westmere-EX, Eagleton) 256-bit DDR3 on-Die Registered PC10666 mem controller (10 cores, 4xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 6, 2011 - {$4616} | 1567 balls 2400MHz (133x18) (2.8GHz Turbo) (64-bit QPI) ?v | Socket LS | 10x 32KB data (?-way) 10x 32KB instruction (?-way) 10x 256KB on-Die unified L2 (?-way) 30MB on-Die shared L3 (?-way) | 2600 million 0.032µm process 513mm² die |
Xeon (Socket 1155) | ||||
---|---|---|---|---|
Intel Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
Xeon E3-1220 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EN) 192-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, 1xQPI, EM64T, NX bit, VT, TXT, Turbo) April, 2011 - {$189} | 1155 balls 3100MHz (100x31) (3.4GHz Turbo) (64-bit QPI) ?v | Socket 1155 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 995 million 0.032µm process 216mm² die |
Xeon E3-1220L MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EN) 192-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April, 2011 - {$189} | 1155 balls 2200MHz (100x22) (3.4GHz Turbo) (64-bit QPI) ?v | Socket 1155 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 2x 1.5k µops instruction (8-way) 2x 256KB on-Die unified L2 (8-way) 3MB on-Die shared L3 (16-way) | 995 million 0.032µm process 216mm² die |
Xeon E3-1225 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EN) 192-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, 850MHz Intel HD 3000 GPU) (1xQPI, EM64T, NX bit, VT, TXT, Turbo) April, 2011 - {$194} | 1155 balls 3100MHz (100x31) (3.4GHz Turbo) (64-bit QPI) ?v | Socket 1155 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 6MB on-Die shared L3 (16-way) | 995 million 0.032µm process 216mm² die |
Xeon E3-1230 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EN) 192-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April, 2011 - {$215} | 1155 balls 3200MHz (100x32) (3.6GHz Turbo) (64-bit QPI) ?v | Socket 1155 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 995 million 0.032µm process 216mm² die |
Xeon E3-1235 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EN) 192-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, 850MHz Intel HD 3000 GPU) (1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April, 2011 - {$240} | 1155 balls 3200MHz (100x32) (3.6GHz Turbo) (64-bit QPI) ?v | Socket 1155 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 995 million 0.032µm process 216mm² die |
Xeon E3-1240 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EN) 192-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April, 2011 - {$250} | 1155 balls 3300MHz (100x33) (3.7GHz Turbo) (64-bit QPI) ?v | Socket 1155 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 995 million 0.032µm process 216mm² die |
Xeon E3-1245 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EN) 192-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, 850MHz Intel HD 3000 GPU) (1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April, 2011 - {$262} | 1155 balls 3300MHz (100x33) (3.7GHz Turbo) (64-bit QPI) ?v | Socket 1155 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 995 million 0.032µm process 216mm² die |
Xeon E3-1260L MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EN) 192-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, 650MHz Intel HD 2000 GPU) (1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April, 2011 - {$294} | 1155 balls 2400MHz (100x24) (3.3GHz Turbo) (64-bit QPI) ?v | Socket 1155 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 995 million 0.032µm process 216mm² die |
Xeon E3-1270 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EN) 192-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April, 2011 - {$328} | 1155 balls 3400MHz (100x34) (3.8GHz Turbo) (64-bit QPI) ?v | Socket 1155 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 995 million 0.032µm process 216mm² die |
Xeon E3-1275 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EN) 192-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, 850MHz Intel HD 3000 GPU) (1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April, 2011 - {$339} | 1155 balls 3400MHz (100x34) (3.8GHz Turbo) (64-bit QPI) ?v | Socket 1155 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 995 million 0.032µm process 216mm² die |
Xeon E3-1280 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EN) 192-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April, 2011 - {$612} | 1155 balls 3500MHz (100x35) (3.9GHz Turbo) (64-bit QPI) ?v | Socket 1155 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 995 million 0.032µm process 216mm² die |
Xeon E3-1290 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EN) 192-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 5, 2011 - {$885} | 1155 balls 3600MHz (100x36) (4.0GHz Turbo) (64-bit QPI) ?v | Socket 1155 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 995 million 0.032µm process 216mm² die |
Xeon E3-1220Lv2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (dual core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, vPro, Turbo) May 14, 2012 - {$189} | 1155 balls 2300MHz (100x23) (3.5GHz Turbo) (64-bit QPI) ?v | Socket 1155 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 2x 1.5k µops instruction (8-way) 2x 256KB on-Die unified L2 (8-way) 3MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E3-1220v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, 2xQPI, EM64T, NX bit, VT, TXT, vPro, Turbo) May 14, 2012 - {$189} | 1155 balls 3100MHz (100x31) (3.5GHz Turbo) (64-bit QPI) ?v | Socket 1155 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E3-1225v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, 2xQPI, 650MHz Intel HD P4000) (EM64T, NX bit, VT, TXT, vPro, Turbo) May 14, 2012 - {$209} | 1155 balls 3200MHz (100x32) (3.6GHz Turbo) (64-bit QPI) ?v | Socket 1155 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E3-1230v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, vPro, Turbo) May 14, 2012 - {$215} | 1155 balls 3300MHz (100x33) (3.7GHz Turbo) (64-bit QPI) ?v | Socket 1155 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E3-1240v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, vPro, Turbo) May 14, 2012 - {$250} | 1155 balls 3400MHz (100x34) (3.8GHz Turbo) (64-bit QPI) ?v | Socket 1155 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E3-1245v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, 2xQPI, 650MHz Intel HD P4000) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, vPro, Turbo) May 14, 2012 - {$266} | 1155 balls 3400MHz (100x34) (3.8GHz Turbo) (64-bit QPI) ?v | Socket 1155 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E3-1265Lv2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, 2xQPI, 650MHz Intel HD 2500) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, vPro, Turbo) May 14, 2012 - {$294} | 1155 balls 2500MHz (100x25) (3.5GHz Turbo) (64-bit QPI) ?v | Socket 1155 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E3-1270v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, vPro, Turbo) May 14, 2012 - {$328} | 1155 balls 3500MHz (100x35) (3.9GHz Turbo) (64-bit QPI) ?v | Socket 1155 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E3-1275v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, 2xQPI, 650MHz Intel HD P4000) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, vPro, Turbo) May 14, 2012 - {$339} | 1155 balls 3500MHz (100x35) (3.9GHz Turbo) (64-bit QPI) ?v | Socket 1155 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E3-1280v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, vPro, Turbo) May 14, 2012 - {$612} | 1155 balls 3600MHz (100x36) (4.0GHz Turbo) (64-bit QPI) ?v | Socket 1155 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E3-1290v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, vPro, Turbo) May 14, 2012 - {$885} | 1155 balls 3700MHz (100x37) (4.1GHz Turbo) (64-bit QPI) ?v | Socket 1155 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon (Socket 2011) | ||||
---|---|---|---|---|
Intel Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
Xeon E5-1620 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 5, 2012 - {$294} | 2011 balls 3600MHz (100x36) (3.8GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 10MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-1650 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (6 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 5, 2012 - {$583} | 2011 balls 3200MHz (100x32) (3.8GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 10MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-1660 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (6 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 5, 2012 - {$1080} | 2011 balls 3300MHz (100x33) (3.9GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-2403 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC8500 mem controller (quad core, 2xQPI, EM64T, NX bit, VT, TXT) May 14, 2012 - {$188} | 2011 balls 1800MHz (100x18) (64-bit QPI) ?v | Socket 2011 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 10MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-2407 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC8500 mem controller (quad core, 2xQPI, EM64T, NX bit, VT, TXT) May 14, 2012 - {$250} | 2011 balls 2200MHz (100x22) (64-bit QPI) ?v | Socket 2011 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 10MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-2420 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC10666 mem controller (6 cores, 2xQPI, SMT Hypertreading, EM64T, NX bit, VT, TXT, Turbo) May 14, 2012 - {$387} | 2011 balls 1900MHz (100x19) (2.4GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-2430 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC10666 mem controller (6 cores, 2xQPI, SMT Hypertreading, EM64T, NX bit, VT, TXT, Turbo) May 14, 2012 - {$551} | 2011 balls 2200MHz (100x22) (2.7GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-2430L MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC10666 mem controller (6 cores, 2xQPI, SMT Hypertreading, EM64T, NX bit, VT, TXT, Turbo) May 14, 2012 - {$662} | 2011 balls 2000MHz (100x20) (2.5GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-2440 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC10666 mem controller (6 cores, 2xQPI, SMT Hypertreading, EM64T, NX bit, VT, TXT, Turbo) May 14, 2012 - {$832} | 2011 balls 2400MHz (100x24) (2.9GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-2450 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (8 cores, 2xQPI, SMT Hypertreading, EM64T, NX bit, VT, TXT, Turbo) May 14, 2012 - {$1107} | 2011 balls 2100MHz (100x21) (2.9GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-2450L MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (8 cores, 2xQPI, SMT Hypertreading, EM64T, NX bit, VT, TXT, Turbo) May 14, 2012 - {$1107} | 2011 balls 1800MHz (100x18) (2.3GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-2470 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (8 cores, 2xQPI, SMT Hypertreading, EM64T, NX bit, VT, TXT, Turbo) May 14, 2012 - {$1440} | 2011 balls 2200MHz (100x22) (3.1GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-2603 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC8500 mem controller (quad core, 2xQPI, EM64T, NX bit, VT, TXT) March 5, 2012 - {$198} | 2011 balls 1800MHz (100x18) (64-bit QPI) ?v | Socket 2011 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 10MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-2609 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC8500 mem controller (quad core, 2xQPI, EM64T, NX bit, VT, TXT) March 5, 2012 - {$294} | 2011 balls 2400MHz (100x24) (64-bit QPI) ?v | Socket 2011 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 10MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-2620 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC10666 mem controller (6 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 5, 2012 - {$406} | 2011 balls 2000MHz (100x20) (2.5GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-2630 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC10666 mem controller (6 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 5, 2012 - {$612} | 2011 balls 2300MHz (100x23) (2.8GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-2630L MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC10666 mem controller (6 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 5, 2012 - {$662} | 2011 balls 2000MHz (100x20) (2.5GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-2637 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (dual core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 5, 2012 - {$885} | 2011 balls 3000MHz (100x30) (3.5GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 5MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-2640 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC10666 mem controller (6 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 5, 2012 - {$885} | 2011 balls 2500MHz (100x25) (3.0GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-2643 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 5, 2012 - {$885} | 2011 balls 3300MHz (100x33) (3.5GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 10MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-2650 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (8 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 5, 2012 - {$1107} | 2011 balls 2000MHz (100x20) (2.8GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-2650L MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (8 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 5, 2012 - {$1107} | 2011 balls 1800MHz (100x18) (2.3GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-2658 MMX SSE SSE2 SSE3 SSE4.2 (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (8 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 5, 2012 - {$1186} | 2011 balls 2100MHz (100x21) (2.4GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-2660 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (8 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 5, 2012 - {$1329} | 2011 balls 2200MHz (100x22) (3.0GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-2665 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (8 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 5, 2012 - {$1440} | 2011 balls 2400MHz (100x24) (3.1GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-2667 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (6 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 5, 2012 - {$1552} | 2011 balls 2900MHz (100x29) (3.5GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-2670 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (8 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 5, 2012 - {$1552} | 2011 balls 2600MHz (100x26) (3.3GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-2680 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (8 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 5, 2012 - {$1723} | 2011 balls 2700MHz (100x27) (3.5GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-2687W MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (8 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 5, 2012 - {$1885} | 2011 balls 3100MHz (100x31) (3.8GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-2690 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (8 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 5, 2012 - {$2057} | 2011 balls 2900MHz (100x29) (3.8GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-4603 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC8500 mem controller (4 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT) May 14, 2012 - {$551} | 2011 balls 2000MHz (100x20) (64-bit QPI) ?v | Socket 2011 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 10MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-4607 MMX SSE SSE2 SSE3 SSE4.2 (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC10666 mem controller (6 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT) May 14, 2012 - {$885} | 2011 balls 2200MHz (100x22) (64-bit QPI) ?v | Socket 2011 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-4610 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC10666 mem controller (6 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) May 14, 2012 - {$1219} | 2011 balls 2400MHz (100x24) (2.9GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-4617 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC10666 mem controller (6 cores, 2xQPI, EM64T, NX bit, VT, TXT, Turbo) May 14, 2012 - {$1611} | 2011 balls 2900MHz (100x29) (3.4GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-4620 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC10666 mem controller (8 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) May 14, 2012 - {$1611} | 2011 balls 2200MHz (100x22) (2.6GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-4640 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (8 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) May 14, 2012 - {$2725} | 2011 balls 2400MHz (100x24) (2.8GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-4650 MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (8 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) May 14, 2012 - {$3616} | 2011 balls 2700MHz (100x27) (3.3GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-4650L MMX SSE SSE2 SSE3 SSE4.2 AVX (Sandy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (8 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) May 14, 2012 - {$3616} | 2011 balls 2600MHz (100x26) (3.1GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (20-way) | 2270 million 0.032µm process 435mm² die |
Xeon E5-1620v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC14933 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 3Q 2013 | 2011 balls 3700MHz (100x37) (3.9GHz Turbo) ?v | Socket 2011 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 10MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-1650v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC14933 mem controller (6 cores, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 3Q 2013 | 2011 balls 3500MHz (100x35) (3.9GHz Turbo) ?v | Socket 2011 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-1660v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC14933 mem controller (6 cores, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 3Q 2013 | 2011 balls 3700MHz (100x37) (4.0GHz Turbo) ?v | Socket 2011 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2603v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC10666 mem controller (quad core, 2xQPI, EM64T, NX bit, VT) 3Q 2013 | 2011 balls 1800MHz (100x18) (64-bit QPI) ?v | Socket 2011 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 10MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2609v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC10666 mem controller (quad core, 2xQPI, EM64T, NX bit, VT) 3Q 2013 | 2011 balls 2500MHz (100x25) (64-bit QPI) ?v | Socket 2011 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 10MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2618v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC10666 mem controller (6 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT) 3Q 2013 | 2011 balls 2000MHz (100x20) (64-bit QPI) ?v | Socket 2011 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2620v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (6 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 3Q 2013 | 2011 balls 2100MHz (100x21) (2.6GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2628Lv2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (8 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 3Q 2013 | 2011 balls 1900MHz (100x19) (2.4GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2630v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (6 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 3Q 2013 | 2011 balls 2600MHz (100x26) (3.1GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2630Lv2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (6 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 3Q 2013 | 2011 balls 2400MHz (100x24) (2.8GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2637v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC14933 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 3Q 2013 | 2011 balls 3500MHz (100x35) (3.8GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2640v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (8 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 3Q 2013 | 2011 balls 2000MHz (100x20) (2.5GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2643v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC14933 mem controller (6 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 3Q 2013 | 2011 balls 3500MHz (100x35) (3.8GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 25MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2648Lv2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC14933 mem controller (10 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 3Q 2013 | 2011 balls 1900MHz (100x19) (2.5GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (8-way) 25MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2650v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC14933 mem controller (8 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 3Q 2013 | 2011 balls 2600MHz (100x26) (3.4GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2650Lv2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (10 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 3Q 2013 | 2011 balls 1700MHz (100x17) (3.4GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (8-way) 25MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2658v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC14933 mem controller (10 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 3Q 2013 | 2011 balls 2400MHz (100x24) (3.0GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (8-way) 25MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2660v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC14933 mem controller (10 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 3Q 2013 | 2011 balls 2200MHz (100x22) (3.0GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (8-way) 25MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2667v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC14933 mem controller (8 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 3Q 2013 | 2011 balls 3300MHz (100x33) (4.0GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 25MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2670v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC14933 mem controller (10 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 3Q 2013 | 2011 balls 2500MHz (100x25) (3.3GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (8-way) 25MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2680v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC14933 mem controller (10 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 3Q 2013 | 2011 balls 2800MHz (100x28) (3.6GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (8-way) 25MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2687v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC14933 mem controller (8 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 3Q 2013 | 2011 balls 3400MHz (100x34) (4.0GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 25MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2690v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC14933 mem controller (10 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 3Q 2013 | 2011 balls 3000MHz (100x30) (3.6GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (8-way) 25MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2695v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC14933 mem controller (12 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 3Q 2013 | 2011 balls 2400MHz (100x24) (3.2GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 12x 32KB data (8-way) 12x 32KB instruction (8-way) 12x 1.5k µops instruction (8-way) 12x 256KB on-Die unified L2 (8-way) 30MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2697v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC14933 mem controller (12 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 3Q 2013 | 2011 balls 2700MHz (100x27) (3.5GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 12x 32KB data (8-way) 12x 32KB instruction (8-way) 12x 1.5k µops instruction (8-way) 12x 256KB on-Die unified L2 (8-way) 30MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-4603v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC10666 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT) 1Q 2014 | 2011 balls 2200MHz (100x22) (64-bit QPI) ?v | Socket 2011 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 10MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-4607v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC10666 mem controller (6 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT) 1Q 2014 | 2011 balls 2600MHz (100x26) (64-bit QPI) ?v | Socket 2011 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-4610v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (8 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 1Q 2014 | 2011 balls 2300MHz (100x23) (2.7GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 16MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-4620v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (8 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 1Q 2014 | 2011 balls 2600MHz (100x26) (3.0GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-4624v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC14933 mem controller (10 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 1Q 2014 | 2011 balls 1900MHz (100x19) (2.5GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-4627v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC14933 mem controller (8 cores, 2xQPI, EM64T, NX bit, VT, Turbo) 1Q 2014 | 2011 balls 3300MHz (100x33) (3.6GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-4640v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC14933 mem controller (10 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 1Q 2014 | 2011 balls 2200MHz (100x22) (2.7GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-4650v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC14933 mem controller (10 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 1Q 2014 | 2011 balls 2400MHz (100x24) (2.9GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (8-way) 25MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-4657v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EP) 256-bit DDR3 on-Die unbuffered PC14933 mem controller (12 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 1Q 2014 | 2011 balls 2400MHz (100x24) (2.9GHz Turbo) (64-bit QPI) ?v | Socket 2011 | 12x 32KB data (8-way) 12x 32KB instruction (8-way) 12x 1.5k µops instruction (8-way) 12x 256KB on-Die unified L2 (8-way) 30MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon (Socket 1356) | ||||
---|---|---|---|---|
Xeon E5-1428Lv2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EN) 192-bit DDR3 on-Die unbuffered PC12800 mem controller (6 cores, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 1Q 2014 - {$494} | 1356 balls 2200MHz (100x22) (2.7GHz Turbo) (64-bit QPI) ?v | Socket 1356 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2403v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EN) 192-bit DDR3 on-Die unbuffered PC10666 mem controller (quad core, 1xQPI, EM64T, NX bit, VT) 1Q 2014 - {$192} | 1356 balls 1800MHz (100x18) (64-bit QPI) ?v | Socket 1356 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 10MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2407v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EN) 192-bit DDR3 on-Die unbuffered PC10666 mem controller (quad core, 1xQPI, EM64T, NX bit, VT) 1Q 2014 - {$250} | 1356 balls 2400MHz (100x24) (64-bit QPI) ?v | Socket 1356 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 10MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2418Lv2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EN) 192-bit DDR3 on-Die unbuffered PC10666 mem controller (6 cores, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT) 1Q 2014 - {$607} | 1356 balls 2000MHz (100x20) (64-bit QPI) ?v | Socket 1356 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2420v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EN) 192-bit DDR3 on-Die unbuffered PC12800 mem controller (6 cores, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 1Q 2014 - {$406} | 1356 balls 2200MHz (100x22) (2.7GHz Turbo) (64-bit QPI) ?v | Socket 1356 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2428Lv2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EN) 192-bit DDR3 on-Die unbuffered PC12800 mem controller (8 cores, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 1Q 2014 - {$1013} | 1356 balls 1800MHz (100x18) (2.3GHz Turbo) (64-bit QPI) ?v | Socket 1356 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2430v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EN) 192-bit DDR3 on-Die unbuffered PC12800 mem controller (6 cores, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 1Q 2014 - {$551} | 1356 balls 2500MHz (100x25) (3.0GHz Turbo) (64-bit QPI) ?v | Socket 1356 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2430Lv2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EN) 192-bit DDR3 on-Die unbuffered PC12800 mem controller (6 cores, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 1Q 2014 - {$612} | 1356 balls 2400MHz (100x24) (2.8GHz Turbo) (64-bit QPI) ?v | Socket 1356 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2440v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EN) 192-bit DDR3 on-Die unbuffered PC12800 mem controller (8 cores, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 1Q 2014 - {$832} | 1356 balls 1900MHz (100x19) (2.4GHz Turbo) (64-bit QPI) ?v | Socket 1356 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2440Lv2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EN) 192-bit DDR3 on-Die unbuffered PC12800 mem controller (10 cores, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 1Q 2014 - {$1424} | 1356 balls 1800MHz (100x18) (2.4GHz Turbo) (64-bit QPI) ?v | Socket 1356 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (8-way) 25MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2450v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EN) 192-bit DDR3 on-Die unbuffered PC12800 mem controller (8 cores, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 1Q 2014 - {$1107} | 1356 balls 2500MHz (100x25) (3.3GHz Turbo) (64-bit QPI) ?v | Socket 1356 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2450Lv2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EN) 192-bit DDR3 on-Die unbuffered PC12800 mem controller (10 cores, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 1Q 2014 - {$1219} | 1356 balls 1700MHz (100x17) (2.1GHz Turbo) (64-bit QPI) ?v | Socket 1356 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (8-way) 25MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2470v2 MMX SSE SSE2 SSE3 SSE4.2 AVX (Ivy Bridge-EN) 192-bit DDR3 on-Die unbuffered PC12800 mem controller (10 cores, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) 1Q 2014 - {$1440} | 1356 balls 2400MHz (100x24) (3.2GHz Turbo) (64-bit QPI) ?v | Socket 1356 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (8-way) 25MB on-Die shared L3 (20-way) | ? million 0.022µm process ?mm² die |
Xeon (Haswell) | ||||
---|---|---|---|---|
Intel Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
Xeon E3-1220v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-DT) 128-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, EM64T, NX bit, VT, TXT, Turbo) June 3, 2013 - {$193} | 1150 balls 3100MHz (100x31) (3.5GHz Turbo) (64-bit bus) ?v | Socket 1150 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 1400 million 0.022µm process 177mm² die |
Xeon E3-1220Lv3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-DT) 128-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 1, 2013 - {$193} | 1150 balls 1100MHz (100x11) (2.8GHz Turbo) (64-bit bus) ?v | Socket 1150 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 2x 1.5k µops instruction (8-way) 2x 256KB on-Die unified L2 (8-way) 4MB on-Die shared L3 (?-way) | 1400 million 0.022µm process 177mm² die |
Xeon E3-1225v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-DT) 128-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, 1200MHz Intel HD 4600 GPU) (EM64T, NX bit, VT, TXT, Turbo) June 3, 2013 - {$213} | 1150 balls 3200MHz (100x32) (3.6GHz Turbo) (64-bit bus) ?v | Socket 1150 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 1400 million 0.022µm process 177mm² die |
Xeon E3-1226v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-DT) 128-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, SMT Hyperthreading, 1200MHz Intel HD P4600 GPU) (EM64T, NX bit, VT, TXT, Turbo) May 12, 2014 - {$213} | 1150 balls 3300MHz (100x33) (3.7GHz Turbo) (64-bit bus) ?v | Socket 1150 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 1400 million 0.022µm process 177mm² die |
Xeon E3-1230v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-DT) 128-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) June 3, 2013 - {$240} | 1150 balls 3300MHz (100x33) (3.7GHz Turbo) (64-bit bus) ?v | Socket 1150 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 1400 million 0.022µm process 177mm² die |
Xeon E3-1230Lv3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-DT) 128-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) June 3, 2013 - {$250} | 1150 balls 1800MHz (100x18) (2.8GHz Turbo) (64-bit bus) ?v | Socket 1150 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 1400 million 0.022µm process 177mm² die |
Xeon E3-1231v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-DT) 128-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) May 12, 2014 - {$240} | 1150 balls 3400MHz (100x34) (3.8GHz Turbo) (64-bit bus) ?v | Socket 1150 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 1400 million 0.022µm process 177mm² die |
Xeon E3-1240v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-DT) 128-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) June 3, 2013 - {$262} | 1150 balls 3400MHz (100x34) (3.8GHz Turbo) (64-bit bus) ?v | Socket 1150 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 1400 million 0.022µm process 177mm² die |
Xeon E3-1240Lv3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-DT) 128-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) May 12, 2014 - {$278} | 1150 balls 2000MHz (100x20) (3.0GHz Turbo) (64-bit bus) ?v | Socket 1150 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 1400 million 0.022µm process 177mm² die |
Xeon E3-1241v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-DT) 128-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) May 12, 2014 - {$262} | 1150 balls 3500MHz (100x35) (3.9GHz Turbo) (64-bit bus) ?v | Socket 1150 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 1400 million 0.022µm process 177mm² die |
Xeon E3-1245v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-DT) 128-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, SMT Hyperthreading, 1200MHz Intel HD 4600 GPU) (EM64T, NX bit, VT, TXT, Turbo) June 3, 2013 - {$276} | 1150 balls 3400MHz (100x34) (3.8GHz Turbo) (64-bit bus) ?v | Socket 1150 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 1400 million 0.022µm process 177mm² die |
Xeon E3-1246v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-DT) 128-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, SMT Hyperthreading, 1200MHz Intel HD P4600 GPU) (EM64T, NX bit, VT, TXT, Turbo) May 12, 2014 - {$276} | 1150 balls 3500MHz (100x35) (3.9GHz Turbo) (64-bit bus) ?v | Socket 1150 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 1400 million 0.022µm process 177mm² die |
Xeon E3-1265Lv3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-DT) 128-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, SMT Hyperthreading, 1200MHz Intel HD GPU) (EM64T, NX bit, VT, TXT, Turbo) June 3, 2013 - {$294} | 1150 balls 2500MHz (100x25) (3.7GHz Turbo) (64-bit bus) ?v | Socket 1150 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 1400 million 0.022µm process 177mm² die |
Xeon E3-1268Lv3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-DT) 128-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, SMT Hyperthreading, 1000MHz Intel HD 4600 GPU) (EM64T, NX bit, VT, TXT, Turbo) June 3, 2013 | 1150 balls 2300MHz (100x23) (3.3GHz Turbo) (64-bit bus) ?v | Socket 1150 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 1400 million 0.022µm process 177mm² die |
Xeon E3-1270v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-DT) 128-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) June 3, 2013 - {$328} | 1150 balls 3500MHz (100x35) (3.9GHz Turbo) (64-bit bus) ?v | Socket 1150 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 1400 million 0.022µm process 177mm² die |
Xeon E3-1271v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-DT) 128-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) May 12, 2014 - {$328} | 1150 balls 3600MHz (100x36) (4.0GHz Turbo) (64-bit bus) ?v | Socket 1150 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 1400 million 0.022µm process 177mm² die |
Xeon E3-1275v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-DT) 128-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, SMT Hyperthreading, 1250MHz Intel HD 4600 GPU) (EM64T, NX bit, VT, TXT, Turbo) June 3, 2013 - {$339} | 1150 balls 3500MHz (100x35) (3.9GHz Turbo) (64-bit bus) ?v | Socket 1150 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 1400 million 0.022µm process 177mm² die |
Xeon E3-1275Lv3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-DT) 128-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, SMT Hyperthreading, 1200MHz Intel HD 4600 GPU) (EM64T, NX bit, VT, TXT, Turbo) May 12, 2014 - {$328} | 1150 balls 2700MHz (100x27) (3.9GHz Turbo) (64-bit bus) ?v | Socket 1150 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 1400 million 0.022µm process 177mm² die |
Xeon E3-1276v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-DT) 128-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, SMT Hyperthreading, 1250MHz Intel HD P4600 GPU) (EM64T, NX bit, VT, TXT, Turbo) May 12, 2014 - {$339} | 1150 balls 3600MHz (100x36) (4.0GHz Turbo) (64-bit bus) ?v | Socket 1150 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 1400 million 0.022µm process 177mm² die |
Xeon E3-1280v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-DT) 128-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) June 3, 2013 - {$612} | 1150 balls 3600MHz (100x36) (4.0GHz Turbo) (64-bit bus) ?v | Socket 1150 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 1400 million 0.022µm process 177mm² die |
Xeon E3-1281v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-DT) 128-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) May 12, 2014 - {$612} | 1150 balls 3700MHz (100x37) (4.1GHz Turbo) (64-bit bus) ?v | Socket 1150 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 1400 million 0.022µm process 177mm² die |
Xeon E3-1285v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-DT) 128-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, SMT Hyperthreading, 1300MHz Intel HD 4600 GPU) (EM64T, NX bit, VT, TXT, Turbo) June 3, 2013 - {$662} | 1150 balls 3600MHz (100x36) (4.0GHz Turbo) (64-bit bus) ?v | Socket 1150 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 1400 million 0.022µm process 177mm² die |
Xeon E3-1285Lv3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-DT) 128-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, SMT Hyperthreading, 1250MHz Intel HD 4600 GPU) (EM64T, NX bit, VT, TXT, Turbo) June 3, 2013 - {$774} | 1150 balls 3100MHz (100x31) (3.9GHz Turbo) (64-bit bus) ?v | Socket 1150 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 1400 million 0.022µm process 177mm² die |
Xeon E3-1286v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-DT) 128-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, SMT Hyperthreading, 1300MHz Intel HD P4700 GPU) (EM64T, NX bit, VT, TXT, Turbo) May 12, 2014 - {$662} | 1150 balls 3700MHz (100x37) (4.1GHz Turbo) (64-bit bus) ?v | Socket 1150 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 1400 million 0.022µm process 177mm² die |
Xeon E3-1286Lv3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-DT) 128-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, SMT Hyperthreading, 1250MHz Intel HD P4700 GPU) (EM64T, NX bit, VT, TXT, Turbo) May 12, 2014 - {$774} | 1150 balls 3200MHz (100x32) (4.0GHz Turbo) (64-bit bus) ?v | Socket 1150 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 1400 million 0.022µm process 177mm² die |
Xeon E5-1620v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP) 256-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 2014 - {$294} | 2011 balls 3500MHz (100x35) (3.6GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 10MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-1630v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP) 256-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 2014 - {$372} | 2011 balls 3700MHz (100x37) (3.8GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 10MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-1650v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP) 256-bit DDR4 on-Die unbuffered PC17000 mem controller (6 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 2014 - {$583} | 2011 balls 3500MHz (100x35) (3.8GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-1660v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP) 256-bit DDR4 on-Die unbuffered PC17000 mem controller (8 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 2014 - {$1080} | 2011 balls 3000MHz (100x30) (3.5GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-1680v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP) 256-bit DDR4 on-Die unbuffered PC17000 mem controller (8 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 2014 - {$1723} | 2011 balls 3200MHz (100x32) (3.8GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2603v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP) 256-bit DDR4 on-Die unbuffered PC12800 mem controller (6 cores, 2xQPI, EM64T, NX bit, VT, TXT, Turbo) September 2014 - {$213} | 2011 balls 1600MHz (100x16) (?GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2609v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP) 256-bit DDR4 on-Die unbuffered PC12800 mem controller (6 cores, 2xQPI, EM64T, NX bit, VT, TXT, Turbo) September 2014 - {$303} | 2011 balls 1900MHz (100x19) (?GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2620v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP) 256-bit DDR4 on-Die unbuffered PC14933 mem controller (6 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 2014 - {$417} | 2011 balls 2400MHz (100x24) (3.2GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2623v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP) 256-bit DDR4 on-Die unbuffered PC14933 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 2014 - {$444} | 2011 balls 3000MHz (100x30) (3.5GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 6x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 10MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2630v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP) 256-bit DDR4 on-Die unbuffered PC14933 mem controller (8 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 2014 - {$667} | 2011 balls 2400MHz (100x24) (3.2GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2630Lv3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP) 256-bit DDR4 on-Die unbuffered PC14933 mem controller (8 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 2014 - {$612} | 2011 balls 1800MHz (100x18) (2.9GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2637v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP) 256-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 2014 - {$996} | 2011 balls 3500MHz (100x35) (3.7GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2640v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP) 256-bit DDR4 on-Die unbuffered PC14933 mem controller (8 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 2014 - {$939} | 2011 balls 2600MHz (100x26) (3.4GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2643v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP) 256-bit DDR4 on-Die unbuffered PC17000 mem controller (6 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 2014 - {$1552} | 2011 balls 3400MHz (100x34) (3.7GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2650v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP) 256-bit DDR4 on-Die unbuffered PC17000 mem controller (10 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 2014 - {$1166} | 2011 balls 2300MHz (100x23) (3.0GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (8-way) 25MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2650Lv3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP) 256-bit DDR4 on-Die unbuffered PC17000 mem controller (12 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 2014 - {$1329} | 2011 balls 1800MHz (100x18) (2.5GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 12x 32KB data (8-way) 12x 32KB instruction (8-way) 12x 1.5k µops instruction (8-way) 12x 256KB on-Die unified L2 (8-way) 30MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2660v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP) 256-bit DDR4 on-Die unbuffered PC17000 mem controller (10 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 2014 - {$1445} | 2011 balls 2600MHz (100x26) (3.3GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (8-way) 25MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2667v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP) 256-bit DDR4 on-Die unbuffered PC17000 mem controller (8 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 2014 - {$2057} | 2011 balls 3200MHz (100x32) (3.6GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2670v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP) 256-bit DDR4 on-Die unbuffered PC17000 mem controller (12 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 2014 - {$1589} | 2011 balls 2300MHz (100x23) (3.1GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 12x 32KB data (8-way) 12x 32KB instruction (8-way) 12x 1.5k µops instruction (8-way) 12x 256KB on-Die unified L2 (8-way) 30MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2680v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP) 256-bit DDR4 on-Die unbuffered PC17000 mem controller (12 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 2014 - {$1745} | 2011 balls 2500MHz (100x25) (3.3GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 12x 32KB data (8-way) 12x 32KB instruction (8-way) 12x 1.5k µops instruction (8-way) 12x 256KB on-Die unified L2 (8-way) 30MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2683v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP) 256-bit DDR4 on-Die unbuffered PC17000 mem controller (14 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 2014 - {$1846} | 2011 balls 2000MHz (100x20) (3.0GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 14x 32KB data (8-way) 14x 32KB instruction (8-way) 14x 1.5k µops instruction (8-way) 14x 256KB on-Die unified L2 (8-way) 35MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2687Wv3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP) 256-bit DDR4 on-Die unbuffered PC17000 mem controller (10 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 2014 - {$2141} | 2011 balls 3100MHz (100x31) (3.5GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (8-way) 25MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2690v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP) 256-bit DDR4 on-Die unbuffered PC17000 mem controller (12 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 2014 - {$2090} | 2011 balls 2600MHz (100x26) (3.5GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 12x 32KB data (8-way) 12x 32KB instruction (8-way) 12x 1.5k µops instruction (8-way) 12x 256KB on-Die unified L2 (8-way) 30MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2695v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP) 256-bit DDR4 on-Die unbuffered PC17000 mem controller (14 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 2014 - {$2424} | 2011 balls 2300MHz (100x23) (3.3GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 14x 32KB data (8-way) 14x 32KB instruction (8-way) 14x 1.5k µops instruction (8-way) 14x 256KB on-Die unified L2 (8-way) 35MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2697v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP) 256-bit DDR4 on-Die unbuffered PC17000 mem controller (14 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 2014 - {$2702} | 2011 balls 2600MHz (100x26) (3.6GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 14x 32KB data (8-way) 14x 32KB instruction (8-way) 14x 1.5k µops instruction (8-way) 14x 256KB on-Die unified L2 (8-way) 35MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2698v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP) 256-bit DDR4 on-Die unbuffered PC17000 mem controller (16 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 3Q 2014 | 2011 balls 2300MHz (100x23) (3.6GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 1.5k µops instruction (8-way) 16x 256KB on-Die unified L2 (8-way) 40MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2699v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP) 256-bit DDR4 on-Die unbuffered PC17000 mem controller (18 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 3Q 2014 | 2011 balls 2300MHz (100x23) (3.6GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 18x 32KB data (8-way) 18x 32KB instruction (8-way) 18x 1.5k µops instruction (8-way) 18x 256KB on-Die unified L2 (8-way) 45MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2408Lv3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EN) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, 3xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT) 1Q 2015 | 2011 balls 1800MHz (100x18) (64-bit bus) ?v | Socket 2011-3 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 10MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2418Lv3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EN) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (6 cores, 3xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT) 1Q 2015 | 2011 balls 2000MHz (100x20) (64-bit bus) ?v | Socket 2011-3 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2428Lv3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EN) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (8 cores, 3xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT) 1Q 2015 | 2011 balls 1800MHz (100x18) (64-bit bus) ?v | Socket 2011-3 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-2438Lv3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EN) 256-bit DDR3 on-Die unbuffered PC12800 mem controller (10 cores, 3xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT) 1Q 2015 | 2011 balls 1800MHz (100x18) (64-bit bus) ?v | Socket 2011-3 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (8-way) 25MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-4610v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP4S) 256-bit DDR4 on-Die unbuffered PC??? mem controller (10 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT) 2Q 2015 | 2011 balls 1700MHz (100x17) (64-bit bus) ?v | Socket 2011-3 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (8-way) 25MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-4620v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP4S) 256-bit DDR4 on-Die unbuffered PC??? mem controller (10 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 2Q 2015 | 2011 balls 2000MHz (100x20) (2.6GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (8-way) 25MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-4627v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP4S) 256-bit DDR4 on-Die unbuffered PC??? mem controller (10 cores, 2xQPI, EM64T, NX bit, VT, TXT, Turbo) 2Q 2015 | 2011 balls 2600MHz (100x26) (3.2GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (8-way) 25MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-4640v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP4S) 256-bit DDR4 on-Die unbuffered PC??? mem controller (12 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 2Q 2015 | 2011 balls 1900MHz (100x19) (2.6GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 12x 32KB data (8-way) 12x 32KB instruction (8-way) 12x 1.5k µops instruction (8-way) 12x 256KB on-Die unified L2 (8-way) 30MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-4648v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP4S) 256-bit DDR4 on-Die unbuffered PC??? mem controller (12 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 2Q 2015 | 2011 balls 1700MHz (100x17) (2.2GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 12x 32KB data (8-way) 12x 32KB instruction (8-way) 12x 1.5k µops instruction (8-way) 12x 256KB on-Die unified L2 (8-way) 30MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-4650v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP4S) 256-bit DDR4 on-Die unbuffered PC??? mem controller (12 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 2Q 2015 | 2011 balls 2100MHz (100x21) (2.8GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 12x 32KB data (8-way) 12x 32KB instruction (8-way) 12x 1.5k µops instruction (8-way) 12x 256KB on-Die unified L2 (8-way) 30MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-4655v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP4S) 256-bit DDR4 on-Die unbuffered PC??? mem controller (6 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 2Q 2015 | 2011 balls 2900MHz (100x29) (3.2GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 30MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-4660v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP4S) 256-bit DDR4 on-Die unbuffered PC??? mem controller (14 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 2Q 2015 | 2011 balls 2100MHz (100x21) (2.9GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 14x 32KB data (8-way) 14x 32KB instruction (8-way) 14x 1.5k µops instruction (8-way) 14x 256KB on-Die unified L2 (8-way) 35MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-4667v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP4S) 256-bit DDR4 on-Die unbuffered PC??? mem controller (16 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 2Q 2015 | 2011 balls 2000MHz (100x20) (2.9GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 1.5k µops instruction (8-way) 16x 256KB on-Die unified L2 (8-way) 40MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E5-4669v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EP4S) 256-bit DDR4 on-Die unbuffered PC??? mem controller (18 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 2Q 2015 | 2011 balls 2100MHz (100x21) (2.9GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 18x 32KB data (8-way) 18x 32KB instruction (8-way) 18x 1.5k µops instruction (8-way) 18x 256KB on-Die unified L2 (8-way) 45MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E7-4809v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EX) 256-bit DDR4 on-Die unbuffered PC14933 mem controller (8 cores, 3xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT) May 5, 2015 - {$1223} | 2011 balls 2000MHz (100x20) (64-bit bus) ?v | Socket 2011-3 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E7-4820v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EX) 256-bit DDR4 on-Die unbuffered PC14933 mem controller (10 cores, 3xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT) May 5, 2015 - {$1502} | 2011 balls 1900MHz (100x19) (64-bit bus) ?v | Socket 2011-3 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (8-way) 25MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E7-4830v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EX) 256-bit DDR4 on-Die unbuffered PC14933 mem controller (12 cores, 3xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) May 5, 2015 - {$2170} | 2011 balls 2100MHz (100x21) (2.7GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 12x 32KB data (8-way) 12x 32KB instruction (8-way) 12x 1.5k µops instruction (8-way) 12x 256KB on-Die unified L2 (8-way) 30MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E7-4850v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EX) 256-bit DDR4 on-Die unbuffered PC14933 mem controller (14 cores, 3xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) May 5, 2015 - {$3003} | 2011 balls 2200MHz (100x22) (2.8GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 14x 32KB data (8-way) 14x 32KB instruction (8-way) 14x 1.5k µops instruction (8-way) 14x 256KB on-Die unified L2 (8-way) 35MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E7-8860v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EX) 256-bit DDR4 on-Die unbuffered PC14933 mem controller (16 cores, 3xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) May 5, 2015 - {$4861} | 2011 balls 2200MHz (100x22) (3.2GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 1.5k µops instruction (8-way) 16x 256KB on-Die unified L2 (8-way) 40MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E7-8867v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EX) 256-bit DDR4 on-Die unbuffered PC14933 mem controller (16 cores, 3xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) May 5, 2015 - {$4672} | 2011 balls 2500MHz (100x25) (3.3GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 1.5k µops instruction (8-way) 16x 256KB on-Die unified L2 (8-way) 45MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E7-8870v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EX) 256-bit DDR4 on-Die unbuffered PC14933 mem controller (18 cores, 3xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) May 5, 2015 - {$4672} | 2011 balls 2100MHz (100x21) (2.9GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 18x 32KB data (8-way) 18x 32KB instruction (8-way) 18x 1.5k µops instruction (8-way) 18x 256KB on-Die unified L2 (8-way) 45MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E7-8880v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EX) 256-bit DDR4 on-Die unbuffered PC14933 mem controller (18 cores, 3xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) May 5, 2015 - {$5895} | 2011 balls 2300MHz (100x23) (3.1GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 18x 32KB data (8-way) 18x 32KB instruction (8-way) 18x 1.5k µops instruction (8-way) 18x 256KB on-Die unified L2 (8-way) 45MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E7-8880Lv3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EX) 256-bit DDR4 on-Die unbuffered PC14933 mem controller (18 cores, 3xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) May 5, 2015 - {$6063} | 2011 balls 2000MHz (100x20) (2.8GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 18x 32KB data (8-way) 18x 32KB instruction (8-way) 18x 1.5k µops instruction (8-way) 18x 256KB on-Die unified L2 (8-way) 45MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E7-8890v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EX) 256-bit DDR4 on-Die unbuffered PC14933 mem controller (18 cores, 3xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) May 5, 2015 - {$7174} | 2011 balls 2500MHz (100x25) (3.3GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 18x 32KB data (8-way) 18x 32KB instruction (8-way) 18x 1.5k µops instruction (8-way) 18x 256KB on-Die unified L2 (8-way) 45MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E7-8891v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EX) 256-bit DDR4 on-Die unbuffered PC14933 mem controller (10 cores, 3xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) May 5, 2015 - {$6841} | 2011 balls 2800MHz (100x28) (3.5GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (8-way) 45MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon E7-8893v3 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Haswell-EX) 256-bit DDR4 on-Die unbuffered PC14933 mem controller (4 cores, 3xQPI, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) May 5, 2015 - {$6841} | 2011 balls 3200MHz (100x32) (3.5GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 45MB on-Die shared L3 (?-way) | ? million 0.022µm process ?mm² die |
Xeon (Broadwell) | ||||
---|---|---|---|---|
Intel Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
Xeon D-1520 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell) 128-bit DDR4 on-Die unbuffered PC? mem controller (quad core, EM64T, NX bit, VT, TXT, Turbo) 1Q 2015 | FCBGA 1667 2200MHz (100x22) (2.6GHz Turbo) (64-bit bus) ?v | Surface- Mounted | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 6MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon D-1540 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell) 128-bit DDR4 on-Die unbuffered PC? mem controller (8 cores, EM64T, NX bit, VT, TXT, Turbo) 1Q 2015 | FCBGA 1667 2000MHz (100x20) (2.6GHz Turbo) (64-bit bus) ?v | Surface- Mounted | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1258Lv4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell) 128-bit DDR3 on-Die unbuffered PC12800 mem controller (quad core, 700MHz P5700 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) June 2, 2015 - {$393} | FCBGA 1364 1800MHz (100x18) (3.2GHz Turbo) (64-bit bus) ?v | Surface- Mounted | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 6MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1278Lv4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (quad core, 800MHz Iris Pro 6300 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) June 2, 2015 - {$449} | FCBGA 1364 2000MHz (100x20) (3.3GHz Turbo) (64-bit bus) ?v | Surface -Mounted | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 6MB on-Die shared L3 (16-way) 128MB on-Chip GPU eDRAM | ? million 0.014µm process ?mm² die |
Xeon E3-1265Lv4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (quad core, 300MHz Iris Pro 6300 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) June 2, 2015 - {$417} | 1150 balls 2300MHz (100x23) (3.3GHz Turbo) (64-bit bus) ?v | Socket 1150 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 6MB on-Die shared L3 (16-way) 128MB on-Chip GPU eDRAM | ? million 0.014µm process ?mm² die |
Xeon E3-1285v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (quad core, 300MHz Iris Pro 6300 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) June 2, 2015 - {$556} | 1150 balls 3500MHz (100x35) (3.8GHz Turbo) (64-bit bus) ?v | Socket 1150 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 6MB on-Die shared L3 (16-way) 128MB on-Chip GPU eDRAM | ? million 0.014µm process ?mm² die |
Xeon E3-1285Lv4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (quad core, 300MHz Iris Pro 6300 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) June 2, 2015 - {$445} | 1150 balls 3400MHz (100x34) (3.8GHz Turbo) (64-bit bus) ?v | Socket 1150 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 6MB on-Die shared L3 (16-way) 128MB on-Chip GPU eDRAM | ? million 0.014µm process ?mm² die |
Xeon E5-2603v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EP) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (6 cores, EM64T, NX bit, VT, TXT) March 31, 2016 - {$213} | 2011 balls 1700MHz (100x17) (64-bit bus) ?v | Socket 2011 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E5-2608v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EP) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (8 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 31, 2016 - {$363} | 2011 balls 1600MHz (100x16) (1.7GHz Turbo) (64-bit bus) ?v | Socket 2011 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E5-2618Lv4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EP) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (10 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 31, 2016 - {$779} | 2011 balls 2200MHz (100x22) (3.2GHz Turbo) (64-bit bus) ?v | Socket 2011 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (8-way) 25MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E5-2620v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EP) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (8 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 31, 2016 - {$417} | 2011 balls 2100MHz (100x21) (3.0GHz Turbo) (64-bit bus) ?v | Socket 2011 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E5-2628Lv4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EP) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (12 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 31, 2016 - {$1364} | 2011 balls 1900MHz (100x19) (2.4GHz Turbo) (64-bit bus) ?v | Socket 2011 | 12x 32KB data (8-way) 12x 32KB instruction (8-way) 12x 1.5k µops instruction (8-way) 12x 256KB on-Die unified L2 (8-way) 30MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E5-2637v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EP) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 31, 2016 - {$996} | 2011 balls 3500MHz (100x35) (3.7GHz Turbo) (64-bit bus) ?v | Socket 2011 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 15MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E5-2648Lv4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EP) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (14 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 31, 2016 - {$1544} | 2011 balls 1800MHz (100x18) (2.5GHz Turbo) (64-bit bus) ?v | Socket 2011 | 14x 32KB data (8-way) 14x 32KB instruction (8-way) 14x 1.5k µops instruction (8-way) 14x 256KB on-Die unified L2 (8-way) 35MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E5-2658v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EP) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (14 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 31, 2016 - {$1832} | 2011 balls 2300MHz (100x23) (2.8GHz Turbo) (64-bit bus) ?v | Socket 2011 | 14x 32KB data (8-way) 14x 32KB instruction (8-way) 14x 1.5k µops instruction (8-way) 14x 256KB on-Die unified L2 (8-way) 35MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E5-2660v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EP) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (14 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 31, 2016 - {$1445} | 2011 balls 2000MHz (100x20) (3.2GHz Turbo) (64-bit bus) ?v | Socket 2011 | 14x 32KB data (8-way) 14x 32KB instruction (8-way) 14x 1.5k µops instruction (8-way) 14x 256KB on-Die unified L2 (8-way) 35MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E5-2667v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EP) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (8 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 31, 2016 - {$2057} | 2011 balls 3200MHz (100x32) (3.6GHz Turbo) (64-bit bus) ?v | Socket 2011 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 25MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E5-2680v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EP) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (14 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 31, 2016 - {$1745} | 2011 balls 2400MHz (100x24) (3.3GHz Turbo) (64-bit bus) ?v | Socket 2011 | 14x 32KB data (8-way) 14x 32KB instruction (8-way) 14x 1.5k µops instruction (8-way) 14x 256KB on-Die unified L2 (8-way) 35MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E5-2683v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EP) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (16 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 31, 2016 - {$1846} | 2011 balls 2100MHz (100x21) (3.0GHz Turbo) (64-bit bus) ?v | Socket 2011 | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 1.5k µops instruction (8-way) 16x 256KB on-Die unified L2 (8-way) 40MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E5-2687Wv4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EP) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (12 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 31, 2016 - {$2141} | 2011 balls 3000MHz (100x30) (3.5GHz Turbo) (64-bit bus) ?v | Socket 2011 | 12x 32KB data (8-way) 12x 32KB instruction (8-way) 12x 1.5k µops instruction (8-way) 12x 256KB on-Die unified L2 (8-way) 30MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E5-2690v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EP) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (14 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 31, 2016 - {$2090} | 2011 balls 2600MHz (100x26) (3.5GHz Turbo) (64-bit bus) ?v | Socket 2011 | 14x 32KB data (8-way) 14x 32KB instruction (8-way) 14x 1.5k µops instruction (8-way) 14x 256KB on-Die unified L2 (8-way) 35MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E5-2697Av4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EP) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (16 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 31, 2016 - {$2891} | 2011 balls 2600MHz (100x26) (3.6GHz Turbo) (64-bit bus) ?v | Socket 2011 | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 1.5k µops instruction (8-way) 16x 256KB on-Die unified L2 (8-way) 40MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E5-2698v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EP) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (20 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 31, 2016 - {$3226} | 2011 balls 2200MHz (100x22) (3.6GHz Turbo) (64-bit bus) ?v | Socket 2011 | 20x 32KB data (8-way) 20x 32KB instruction (8-way) 20x 1.5k µops instruction (8-way) 20x 256KB on-Die unified L2 (8-way) 50MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E5-2699v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EP) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (22 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 31, 2016 - {$4115} | 2011 balls 2200MHz (100x22) (3.6GHz Turbo) (64-bit bus) ?v | Socket 2011 | 22x 32KB data (8-way) 22x 32KB instruction (8-way) 22x 1.5k µops instruction (8-way) 22x 256KB on-Die unified L2 (8-way) 55MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E5-4610v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EP) 128-bit DDR3 on-Die unbuffered PC??? mem controller (10 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT) 2Q 2016 | 2011 balls 1800MHz (100x18) (64-bit bus) ?v | Socket 2011-3 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (8-way) 25MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E5-4620v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EP) 128-bit DDR3 on-Die unbuffered PC??? mem controller (10 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 2Q 2016 | 2011 balls 2100MHz (100x21) (2.6GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (8-way) 25MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E5-4627v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EP) 128-bit DDR3 on-Die unbuffered PC??? mem controller (10 cores, EM64T, NX bit, VT, TXT, Turbo) 2Q 2016 | 2011 balls 2600MHz (100x26) (3.2GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (8-way) 25MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E5-4628Lv4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EP) 128-bit DDR3 on-Die unbuffered PC??? mem controller (14 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 2Q 2016 | 2011 balls 1800MHz (100x18) (2.2GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 14x 32KB data (8-way) 14x 32KB instruction (8-way) 14x 1.5k µops instruction (8-way) 14x 256KB on-Die unified L2 (8-way) 35MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E5-4640v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EP) 128-bit DDR3 on-Die unbuffered PC??? mem controller (12 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 2Q 2016 | 2011 balls 2100MHz (100x21) (2.6GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (8-way) 30MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E5-4650v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EP) 128-bit DDR3 on-Die unbuffered PC??? mem controller (14 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 2Q 2016 | 2011 balls 2200MHz (100x22) (2.8GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 14x 32KB data (8-way) 14x 32KB instruction (8-way) 14x 1.5k µops instruction (8-way) 14x 256KB on-Die unified L2 (8-way) 35MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E5-4655v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EP) 128-bit DDR3 on-Die unbuffered PC??? mem controller (8 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 2Q 2016 | 2011 balls 2500MHz (100x25) (3.2GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 30MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E5-4660v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EP) 128-bit DDR3 on-Die unbuffered PC??? mem controller (16 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 2Q 2016 | 2011 balls 2200MHz (100x22) (3.0GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 1.5k µops instruction (8-way) 16x 256KB on-Die unified L2 (8-way) 40MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E5-4667v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EP) 128-bit DDR3 on-Die unbuffered PC??? mem controller (18 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 2Q 2016 | 2011 balls 2200MHz (100x22) (3.0GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (8-way) 45MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E5-4669v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EP) 128-bit DDR3 on-Die unbuffered PC??? mem controller (22 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 2Q 2016 | 2011 balls 2200MHz (100x22) (3.0GHz Turbo) (64-bit bus) ?v | Socket 2011-3 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (8-way) 55MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E7-4809v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EX) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (8 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT) June 6, 2016 - {$1223} | 2011 balls 2100MHz (100x21) (64-bit bus) ?v | Socket 2011 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 20MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E7-4820v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EX) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (10 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT) June 6, 2016 - {$1502} | 2011 balls 2000MHz (100x20) (64-bit bus) ?v | Socket 2011 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (8-way) 25MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E7-4830v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EX) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (14 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) June 6, 2016 - {$2170} | 2011 balls 2000MHz (100x20) (2.8GHz Turbo) (64-bit bus) ?v | Socket 2011 | 14x 32KB data (8-way) 14x 32KB instruction (8-way) 14x 1.5k µops instruction (8-way) 14x 256KB on-Die unified L2 (8-way) 35MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E7-4850v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EX) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (16 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) June 6, 2016 - {$3003} | 2011 balls 2100MHz (100x21) (2.8GHz Turbo) (64-bit bus) ?v | Socket 2011 | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 1.5k µops instruction (8-way) 16x 256KB on-Die unified L2 (8-way) 40MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E7-8860v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EX) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (18 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) June 6, 2016 - {$4061} | 2011 balls 2200MHz (100x22) (3.2GHz Turbo) (64-bit bus) ?v | Socket 2011 | 18x 32KB data (8-way) 18x 32KB instruction (8-way) 18x 1.5k µops instruction (8-way) 18x 256KB on-Die unified L2 (8-way) 45MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E7-8867v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EX) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (18 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) June 6, 2016 - {$4672} | 2011 balls 2400MHz (100x24) (3.3GHz Turbo) (64-bit bus) ?v | Socket 2011 | 18x 32KB data (8-way) 18x 32KB instruction (8-way) 18x 1.5k µops instruction (8-way) 18x 256KB on-Die unified L2 (8-way) 45MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E7-8870v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EX) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (20 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) June 6, 2016 - {$4672} | 2011 balls 2100MHz (100x21) (3.0GHz Turbo) (64-bit bus) ?v | Socket 2011 | 20x 32KB data (8-way) 20x 32KB instruction (8-way) 20x 1.5k µops instruction (8-way) 20x 256KB on-Die unified L2 (8-way) 50MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E7-8880v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EX) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (22 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) June 6, 2016 - {$5895} | 2011 balls 2200MHz (100x22) (3.3GHz Turbo) (64-bit bus) ?v | Socket 2011 | 22x 32KB data (8-way) 22x 32KB instruction (8-way) 22x 1.5k µops instruction (8-way) 22x 256KB on-Die unified L2 (8-way) 55MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E7-8890v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EX) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (24 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) June 6, 2016 - {$7174} | 2011 balls 2200MHz (100x22) (3.4GHz Turbo) (64-bit bus) ?v | Socket 2011 | 24x 32KB data (8-way) 24x 32KB instruction (8-way) 24x 1.5k µops instruction (8-way) 24x 256KB on-Die unified L2 (8-way) 60MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E7-8891v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EX) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (10 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) June 6, 2016 - {$6841} | 2011 balls 2800MHz (100x28) (3.5GHz Turbo) (64-bit bus) ?v | Socket 2011 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (8-way) 60MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E7-8893v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EX) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (4 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) June 6, 2016 - {$6841} | 2011 balls 3200MHz (100x32) (3.5GHz Turbo) (64-bit bus) ?v | Socket 2011 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 60MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E7-8894v4 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Broadwell-EX) 128-bit DDR3 on-Die unbuffered PC14933 mem controller (24 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) February 6, 2017 - {$8898} | 2011 balls 2400MHz (100x24) (3.4GHz Turbo) (64-bit bus) ?v | Socket 2011 | 24x 32KB data (8-way) 24x 32KB instruction (8-way) 24x 1.5k µops instruction (8-way) 24x 256KB on-Die unified L2 (8-way) 60MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon (Skylake) | ||||
---|---|---|---|---|
Intel Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
Xeon E3-1220v5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, EM64T, NX bit, VT, TXT, Turbo) October 19, 2015 - ($193) | 1151 balls 3000MHz (100x30) (3.5GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1225v5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, 350MHz P530 GPU) (EM64T, NX bit, VT, TXT, Turbo) October 19, 2015 - ($213) | 1151 balls 3300MHz (100x33) (3.7GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1230v5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) October 19, 2015 - ($250) | 1151 balls 3400MHz (100x34) (3.8GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1235Lv5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, 350MHz P530 GPU) (EM64T, NX bit, VT, TXT, Turbo) October 19, 2015 - ($250) | 1151 balls 2000MHz (100x20) (3.0GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1240v5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) October 19, 2015 - ($272) | 1151 balls 3500MHz (100x35) (3.9GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1240Lv5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) October 19, 2015 - ($278) | 1151 balls 2100MHz (100x21) (3.2GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1245v5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, 350MHz P530 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) October 19, 2015 - ($284) | 1151 balls 3500MHz (100x35) (3.9GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1260Lv5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) October 19, 2015 - ($294) | 1151 balls 2900MHz (100x29) (3.9GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1270v5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) October 19, 2015 - ($328) | 1151 balls 3600MHz (100x36) (4.0GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1275v5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, 350MHz P530 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) October 19, 2015 - ($339) | 1151 balls 3600MHz (100x36) (4.0GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1280v5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) October 19, 2015 - ($612) | 1151 balls 3700MHz (100x37) (4.0GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1225v5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, 1150MHz P530 GPU) (EM64T, NX bit, VT, TXT, Turbo) 4Q 2015 | 1151 balls 3300MHz (100x33) (3.7GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1230v5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 4Q 2015 | 1151 balls 3400MHz (100x34) (3.8GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1235Lv5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, ?MHz P530 GPU) (EM64T, NX bit, VT, TXT, Turbo) 4Q 2015 | 1151 balls 2000MHz (100x20) (3.0GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1240v5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 4Q 2015 | 1151 balls 3500MHz (100x35) (3.9GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1240Lv5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 4Q 2015 | 1151 balls 2100MHz (100x21) (3.2GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1245v5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, 1150MHz P530 GPU) (EM64T, NX bit, VT, TXT, Turbo) 4Q 2015 | 1151 balls 3500MHz (100x35) (3.9GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1260Lv5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 4Q 2015 | 1151 balls 2900MHz (100x29) (3.9GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1268Lv5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, 1000MHz P530 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 4Q 2015 | 1151 balls 2400MHz (100x24) (3.4GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1270v5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 4Q 2015 | 1151 balls 3600MHz (100x36) (4.0GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1275v5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, 1150MHz P530 GPU) (EM64T, NX bit, VT, TXT, Turbo) 4Q 2015 | 1151 balls 3600MHz (100x36) (4.0GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1280v5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 4Q 2015 | 1151 balls 3700MHz (100x37) (4.0GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1505Lv5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, 1000MHz P530 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) October 19, 2015 | 1151 balls 2000MHz (100x20) (2.8GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1505Mv5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, 1050MHz P530 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 1, 2015 | 1151 balls 2800MHz (100x28) (3.7GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1515Mv5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, 1000MHz P580 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 1Q 2016 | 1151 balls 2800MHz (100x28) (3.7GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1535Mv5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, 1050MHz P530 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 1, 2015 | 1151 balls 2900MHz (100x29) (3.8GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1545Mv5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, 1050MHz P580 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 1Q 2016 | 1151 balls 2900MHz (100x28) (3.8GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1558Lv5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, 1000MHz P555 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 2Q 2016 | 1151 balls 1900MHz (100x19) (3.3GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1565Lv5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, 1050MHz P580 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 2Q 2016 | 1151 balls 2500MHz (100x25) (3.5GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1575Mv5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, 1100MHz P580 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 1Q 2016 | 1151 balls 3000MHz (100x30) (3.9GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1578Lv5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, 1000MHz P580 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 2Q 2016 | 1151 balls 2000MHz (100x20) (3.4GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1585Lv5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, 1150MHz P580 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 2Q 2016 | 1151 balls 3000MHz (100x30) (3.7GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1585v5 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Skylake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, 1150MHz P580 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) 2Q 2016 | 1151 balls 3500MHz (100x35) (3.9GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon (Kaby Lake) | ||||
---|---|---|---|---|
Intel Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
Xeon E3-1220v6 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Kaby Lake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, EM64T, NX bit, VT, TXT, Turbo) March 27, 2017 - ($193) | 1151 balls 3000MHz (100x30) (3.5GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1225v6 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Kaby Lake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, 1150MHz P630 HD) (EM64T, NX bit, VT, TXT, Turbo) March 27, 2017 - ($213) | 1151 balls 3300MHz (100x33) (3.7GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1230v6 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Kaby Lake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 27, 2017 - ($250) | 1151 balls 3500MHz (100x35) (3.9GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1240v6 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Kaby Lake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 27, 2017 - ($272) | 1151 balls 3700MHz (100x37) (4.1GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1245v6 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Kaby Lake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, 1150MHz P630 HD) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 27, 2017 - ($284) | 1151 balls 3700MHz (100x37) (4.1GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1270v6 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Kaby Lake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 27, 2017 - ($328) | 1151 balls 3800MHz (100x38) (4.2GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1275v6 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Kaby Lake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, 1150MHz P630 HD) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 27, 2017 - ($339) | 1151 balls 3800MHz (100x38) (4.2GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1280v6 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Kaby Lake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) March 27, 2017 - ($612) | 1151 balls 3900MHz (100x39) (4.2GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1501Lv6 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Kaby Lake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, 1000MHz P630 GPU) (EM64T, NX bit, VT, TXT, Turbo) June 12, 2017 | 1151 balls 2100MHz (100x21) (2.9GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 6MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1501Mv6 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Kaby Lake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, 1000MHz P630 GPU) (EM64T, NX bit, VT, TXT, Turbo) June 12, 2017 | 1151 balls 2900MHz (100x29) (3.6GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 6MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1505Lv6 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Kaby Lake) 128-bit DDR4 on-Die unbuffered PC17000 mem controller (quad core, 1000MHz P630 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) January 3, 2017 - ($433) | 1151 balls 2200MHz (100x22) (3.0GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1505Mv6 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Kaby Lake) 128-bit DDR4 on-Die unbuffered PC19200 mem controller (quad core, 1100MHz P630 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) January 3, 2017 | 1151 balls 3000MHz (100x30) (4.0GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E3-1535Mv6 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Kaby Lake) 128-bit DDR4 on-Die unbuffered PC19200 mem controller (quad core, 1100MHz P630 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) January 3, 2017 | 1151 balls 3100MHz (100x31) (4.2GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon (Skylake-X) | ||||
---|---|---|---|---|
Intel Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
Xeon W-2104 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-X) 256-bit DDR4 on-Die ECC PC21333 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) August 29, 2017 | 2066 balls 3200MHz (100x32) (64-bit bus) ?v | Socket 2066 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (16-way non-inclusive) 4x 768KB on-Die external unified L2 (16-way non-inclusive) 8.25MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon W-2123 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-X) 256-bit DDR4 on-Die ECC PC21333 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) August 29, 2017 - {$294} | 2066 balls 3600MHz (100x36) (3.9GHz Turbo) (64-bit bus) ?v | Socket 2066 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (16-way non-inclusive) 4x 768KB on-Die external unified L2 (16-way non-inclusive) 8.25MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon W-2125 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-X) 256-bit DDR4 on-Die ECC PC21333 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) August 29, 2017 - {$444} | 2066 balls 4000MHz (100x40) (4.5GHz Turbo) (64-bit bus) ?v | Socket 2066 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (16-way non-inclusive) 4x 768KB on-Die external unified L2 (16-way non-inclusive) 8.25MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon W-2133 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-X) 256-bit DDR4 on-Die ECC PC21333 mem controller (6 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) August 29, 2017 - {$617} | 2066 balls 3600MHz (100x36) (3.9GHz Turbo) (64-bit bus) ?v | Socket 2066 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (16-way non-inclusive) 6x 768KB on-Die external unified L2 (16-way non-inclusive) 8.25MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon W-2135 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-X) 256-bit DDR4 on-Die ECC PC21333 mem controller (6 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) August 29, 2017 - {$835} | 2066 balls 3700MHz (100x37) (4.5GHz Turbo) (64-bit bus) ?v | Socket 2066 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (16-way non-inclusive) 6x 768KB on-Die external unified L2 (16-way non-inclusive) 8.25MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon W-2145 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-X) 256-bit DDR4 on-Die ECC PC21333 mem controller (8 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) August 29, 2017 - {$1113} | 2066 balls 3700MHz (100x37) (4.5GHz Turbo) (64-bit bus) ?v | Socket 2066 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (16-way non-inclusive) 8x 768KB on-Die external unified L2 (16-way non-inclusive) 11MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon W-2155 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-X) 256-bit DDR4 on-Die ECC PC21333 mem controller (10 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) August 29, 2017 - {$1440} | 2066 balls 3300MHz (100x33) (4.5GHz Turbo) (64-bit bus) ?v | Socket 2066 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (16-way non-inclusive) 10x 768KB on-Die external unified L2 (16-way non-inclusive) 13.75MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon W-2195 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-X) 256-bit DDR4 on-Die ECC PC21333 mem controller (18 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) August 29, 2017 | 2066 balls 2300MHz (100x23) (4.3GHz Turbo) (64-bit bus) ?v | Socket 2066 | 18x 32KB data (8-way) 18x 32KB instruction (8-way) 18x 1.5k µops instruction (8-way) 18x 256KB on-Die unified L2 (16-way non-inclusive) 18x 768KB on-Die external unified L2 (16-way non-inclusive) 24.75MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Scalable (Skylake-SP) | ||||
---|---|---|---|---|
Intel Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
Xeon Bronze 3104 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC17000 mem controller (6 cores, EM64T, NX bit, VT, TXT) July 11, 2017 - {$223} | 3647 balls 1700MHz (100x17) (64-bit bus) ?v | Socket P | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (16-way non-inclusive) 6x 768KB on-Die external unified L2 (16-way non-inclusive) 8.25MB on-Die shared L3 (11-way) | ? million 0.014µm process 322mm² die |
Xeon Bronze 3106 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC17000 mem controller (8 cores, EM64T, NX bit, VT, TXT) July 11, 2017 - {$316} | 3647 balls 1700MHz (100x17) (64-bit bus) ?v | Socket P | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (16-way non-inclusive) 8x 768KB on-Die external unified L2 (16-way non-inclusive) 11MB on-Die shared L3 (11-way) | ? million 0.014µm process 322mm² die |
Xeon Silver 4108 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC19200 mem controller (8 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$427} | 3647 balls 1800MHz (100x18) (3.0GHz Turbo) (64-bit bus) ?v | Socket P | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (16-way non-inclusive) 8x 768KB on-Die external unified L2 (16-way non-inclusive) 11MB on-Die shared L3 (11-way) | ? million 0.014µm process 322mm² die |
Xeon Silver 4109T MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC19200 mem controller (8 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$501} | 3647 balls 2000MHz (100x20) (3.0GHz Turbo) (64-bit bus) ?v | Socket P | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (16-way non-inclusive) 8x 768KB on-Die external unified L2 (16-way non-inclusive) 11MB on-Die shared L3 (11-way) | ? million 0.014µm process 322mm² die |
Xeon Silver 4110 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC19200 mem controller (8 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$511} | 3647 balls 2100MHz (100x21) (3.0GHz Turbo) (64-bit bus) ?v | Socket P | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (16-way non-inclusive) 8x 768KB on-Die external unified L2 (16-way non-inclusive) 11MB on-Die shared L3 (11-way) | ? million 0.014µm process 322mm² die |
Xeon Silver 4112 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC19200 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$483} | 3647 balls 2600MHz (100x26) (3.0GHz Turbo) (64-bit bus) ?v | Socket P | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (16-way non-inclusive) 4x 768KB on-Die external unified L2 (16-way non-inclusive) 8.25MB on-Die shared L3 (11-way) | ? million 0.014µm process 322mm² die |
Xeon Silver 4114 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC19200 mem controller (10 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$704} | 3647 balls 2200MHz (100x22) (3.0GHz Turbo) (64-bit bus) ?v | Socket P | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (16-way non-inclusive) 10x 768KB on-Die external unified L2 (16-way non-inclusive) 13.75MB on-Die shared L3 (11-way) | ? million 0.014µm process 322mm² die |
Xeon Silver 4114T MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC19200 mem controller (10 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 | 3647 balls 2200MHz (100x22) (3.0GHz Turbo) (64-bit bus) ?v | Socket P | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (16-way non-inclusive) 10x 768KB on-Die external unified L2 (16-way non-inclusive) 13.75MB on-Die shared L3 (11-way) | ? million 0.014µm process 322mm² die |
Xeon Silver 4116 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC19200 mem controller (12 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$1012} | 3647 balls 2100MHz (100x21) (3.0GHz Turbo) (64-bit bus) ?v | Socket P | 12x 32KB data (8-way) 12x 32KB instruction (8-way) 12x 1.5k µops instruction (8-way) 12x 256KB on-Die unified L2 (16-way non-inclusive) 12x 768KB on-Die external unified L2 (16-way non-inclusive) 16.5MB on-Die shared L3 (11-way) | ? million 0.014µm process 484mm² die |
Xeon Silver 4116T MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC19200 mem controller (12 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 | 3647 balls 2100MHz (100x21) (3.0GHz Turbo) (64-bit bus) ?v | Socket P | 12x 32KB data (8-way) 12x 32KB instruction (8-way) 12x 1.5k µops instruction (8-way) 12x 256KB on-Die unified L2 (16-way non-inclusive) 12x 768KB on-Die external unified L2 (16-way non-inclusive) 16.5MB on-Die shared L3 (11-way) | ? million 0.014µm process 484mm² die |
Xeon Gold 5115 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC19200 mem controller (10 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$1221} | 3647 balls 2400MHz (100x24) (3.2GHz Turbo) (64-bit bus) ?v | Socket P | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 256KB on-Die unified L2 (16-way non-inclusive) 10x 768KB on-Die external unified L2 (16-way non-inclusive) 13.75MB on-Die shared L3 (11-way) | ? million 0.014µm process 322mm² die |
Xeon Gold 5118 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC19200 mem controller (12 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$1273} | 3647 balls 2300MHz (100x23) (3.2GHz Turbo) (64-bit bus) ?v | Socket P | 12x 32KB data (8-way) 12x 32KB instruction (8-way) 12x 1.5k µops instruction (8-way) 12x 256KB on-Die unified L2 (16-way non-inclusive) 12x 768KB on-Die external unified L2 (16-way non-inclusive) 16.5MB on-Die shared L3 (11-way) | ? million 0.014µm process 484mm² die |
Xeon Gold 5119T MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC19200 mem controller (14 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 | 3647 balls 1900MHz (100x19) (3.2GHz Turbo) (64-bit bus) ?v | Socket P | 14x 32KB data (8-way) 14x 32KB instruction (8-way) 14x 1.5k µops instruction (8-way) 14x 256KB on-Die unified L2 (16-way non-inclusive) 14x 768KB on-Die external unified L2 (16-way non-inclusive) 19.25MB on-Die shared L3 (11-way) | ? million 0.014µm process 484mm² die |
Xeon Gold 5120 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC19200 mem controller (14 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$1561) | 3647 balls 2200MHz (100x22) (3.2GHz Turbo) (64-bit bus) ?v | Socket P | 14x 32KB data (8-way) 14x 32KB instruction (8-way) 14x 1.5k µops instruction (8-way) 14x 256KB on-Die unified L2 (16-way non-inclusive) 14x 768KB on-Die external unified L2 (16-way non-inclusive) 19.25MB on-Die shared L3 (11-way) | ? million 0.014µm process 484mm² die |
Xeon Gold 5120T MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC19200 mem controller (14 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$1727) | 3647 balls 2200MHz (100x22) (3.2GHz Turbo) (64-bit bus) ?v | Socket P | 14x 32KB data (8-way) 14x 32KB instruction (8-way) 14x 1.5k µops instruction (8-way) 14x 256KB on-Die unified L2 (16-way non-inclusive) 14x 768KB on-Die external unified L2 (16-way non-inclusive) 19.25MB on-Die shared L3 (11-way) | ? million 0.014µm process 484mm² die |
Xeon Gold 5122 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC19200 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$1227) | 3647 balls 3600MHz (100x36) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (16-way non-inclusive) 4x 768KB on-Die external unified L2 (16-way non-inclusive) 16.5MB on-Die shared L3 (11-way) | ? million 0.014µm process 322mm² die |
Xeon Gold 6126 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (12 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$1776} | 3647 balls 2600MHz (100x26) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 12x 32KB data (8-way) 12x 32KB instruction (8-way) 12x 1.5k µops instruction (8-way) 12x 256KB on-Die unified L2 (16-way non-inclusive) 12x 768KB on-Die external unified L2 (16-way non-inclusive) 19.25MB on-Die shared L3 (11-way) | ? million 0.014µm process 484mm² die |
Xeon Gold 6126F MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (12 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$1931} | 3647 balls 2600MHz (100x26) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 12x 32KB data (8-way) 12x 32KB instruction (8-way) 12x 1.5k µops instruction (8-way) 12x 256KB on-Die unified L2 (16-way non-inclusive) 12x 768KB on-Die external unified L2 (16-way non-inclusive) 19.25MB on-Die shared L3 (11-way) | ? million 0.014µm process 484mm² die |
Xeon Gold 6126T MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (12 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$1865} | 3647 balls 2600MHz (100x26) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 12x 32KB data (8-way) 12x 32KB instruction (8-way) 12x 1.5k µops instruction (8-way) 12x 256KB on-Die unified L2 (16-way non-inclusive) 12x 768KB on-Die external unified L2 (16-way non-inclusive) 19.25MB on-Die shared L3 (11-way) | ? million 0.014µm process 484mm² die |
Xeon Gold 6128 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (6 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$1697} | 3647 balls 3400MHz (100x34) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (16-way non-inclusive) 6x 768KB on-Die external unified L2 (16-way non-inclusive) 19.25MB on-Die shared L3 (11-way) | ? million 0.014µm process 322mm² die |
Xeon Gold 6130 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (16 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$1900} | 3647 balls 2100MHz (100x21) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 1.5k µops instruction (8-way) 16x 256KB on-Die unified L2 (16-way non-inclusive) 16x 768KB on-Die external unified L2 (16-way non-inclusive) 22MB on-Die shared L3 (11-way) | ? million 0.014µm process 484mm² die |
Xeon Gold 6130F MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (16 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$2049} | 3647 balls 2100MHz (100x21) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 1.5k µops instruction (8-way) 16x 256KB on-Die unified L2 (16-way non-inclusive) 16x 768KB on-Die external unified L2 (16-way non-inclusive) 22MB on-Die shared L3 (11-way) | ? million 0.014µm process 484mm² die |
Xeon Gold 6130T MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (16 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$1988} | 3647 balls 2100MHz (100x21) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 1.5k µops instruction (8-way) 16x 256KB on-Die unified L2 (16-way non-inclusive) 16x 768KB on-Die external unified L2 (16-way non-inclusive) 22MB on-Die shared L3 (11-way) | ? million 0.014µm process 484mm² die |
Xeon Gold 6132 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (14 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$2111} | 3647 balls 2600MHz (100x26) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 14x 32KB data (8-way) 14x 32KB instruction (8-way) 14x 1.5k µops instruction (8-way) 14x 256KB on-Die unified L2 (16-way non-inclusive) 14x 768KB on-Die external unified L2 (16-way non-inclusive) 19.25MB on-Die shared L3 (11-way) | ? million 0.014µm process 484mm² die |
Xeon Gold 6134 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (8 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$2220} | 3647 balls 3200MHz (100x32) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (16-way non-inclusive) 8x 768KB on-Die external unified L2 (16-way non-inclusive) 24.75MB on-Die shared L3 (11-way) | ? million 0.014µm process 322mm² die |
Xeon Gold 6134M MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (8 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$5217} | 3647 balls 3200MHz (100x32) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (16-way non-inclusive) 8x 768KB on-Die external unified L2 (16-way non-inclusive) 24.75MB on-Die shared L3 (11-way) | ? million 0.014µm process 322mm² die |
Xeon Gold 6136 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (12 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$2460} | 3647 balls 3000MHz (100x30) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 12x 32KB data (8-way) 12x 32KB instruction (8-way) 12x 1.5k µops instruction (8-way) 12x 256KB on-Die unified L2 (16-way non-inclusive) 12x 768KB on-Die external unified L2 (16-way non-inclusive) 24.75MB on-Die shared L3 (11-way) | ? million 0.014µm process 484mm² die |
Xeon Gold 6138 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (20 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$2618} | 3647 balls 2000MHz (100x20) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 20x 32KB data (8-way) 20x 32KB instruction (8-way) 20x 1.5k µops instruction (8-way) 20x 256KB on-Die unified L2 (16-way non-inclusive) 20x 768KB on-Die external unified L2 (16-way non-inclusive) 27.5MB on-Die shared L3 (11-way) | ? million 0.014µm process 698mm² die |
Xeon Gold 6138F MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (20 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$2767} | 3647 balls 2000MHz (100x20) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 20x 32KB data (8-way) 20x 32KB instruction (8-way) 20x 1.5k µops instruction (8-way) 20x 256KB on-Die unified L2 (16-way non-inclusive) 20x 768KB on-Die external unified L2 (16-way non-inclusive) 27.5MB on-Die shared L3 (11-way) | ? million 0.014µm process 698mm² die |
Xeon Gold 6138T MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (20 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$2742} | 3647 balls 2000MHz (100x20) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 20x 32KB data (8-way) 20x 32KB instruction (8-way) 20x 1.5k µops instruction (8-way) 20x 256KB on-Die unified L2 (16-way non-inclusive) 20x 768KB on-Die external unified L2 (16-way non-inclusive) 27.5MB on-Die shared L3 (11-way) | ? million 0.014µm process 698mm² die |
Xeon Gold 6140 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (18 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$2451} | 3647 balls 2300MHz (100x23) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 18x 32KB data (8-way) 18x 32KB instruction (8-way) 18x 1.5k µops instruction (8-way) 18x 256KB on-Die unified L2 (16-way non-inclusive) 18x 768KB on-Die external unified L2 (16-way non-inclusive) 24.75MB on-Die shared L3 (11-way) | ? million 0.014µm process 484mm² die |
Xeon Gold 6140M MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (18 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$5448} | 3647 balls 2300MHz (100x23) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 18x 32KB data (8-way) 18x 32KB instruction (8-way) 18x 1.5k µops instruction (8-way) 18x 256KB on-Die unified L2 (16-way non-inclusive) 18x 768KB on-Die external unified L2 (16-way non-inclusive) 24.75MB on-Die shared L3 (11-way) | ? million 0.014µm process 484mm² die |
Xeon Gold 6142 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (16 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$2952} | 3647 balls 2600MHz (100x26) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 1.5k µops instruction (8-way) 16x 256KB on-Die unified L2 (16-way non-inclusive) 16x 768KB on-Die external unified L2 (16-way non-inclusive) 22MB on-Die shared L3 (11-way) | ? million 0.014µm process 484mm² die |
Xeon Gold 6142F MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (16 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$3101} | 3647 balls 2600MHz (100x26) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 1.5k µops instruction (8-way) 16x 256KB on-Die unified L2 (16-way non-inclusive) 16x 768KB on-Die external unified L2 (16-way non-inclusive) 22MB on-Die shared L3 (11-way) | ? million 0.014µm process 484mm² die |
Xeon Gold 6142M MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (16 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$5949} | 3647 balls 2600MHz (100x26) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 1.5k µops instruction (8-way) 16x 256KB on-Die unified L2 (16-way non-inclusive) 16x 768KB on-Die external unified L2 (16-way non-inclusive) 22MB on-Die shared L3 (11-way) | ? million 0.014µm process 484mm² die |
Xeon Gold 6144 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (8 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 | 3647 balls 3500MHz (100x35) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (16-way non-inclusive) 8x 768KB on-Die external unified L2 (16-way non-inclusive) 24.75MB on-Die shared L3 (11-way) | ? million 0.014µm process 322mm² die |
Xeon Gold 6146 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (12 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 | 3647 balls 3200MHz (100x32) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 12x 32KB data (8-way) 12x 32KB instruction (8-way) 12x 1.5k µops instruction (8-way) 12x 256KB on-Die unified L2 (16-way non-inclusive) 12x 768KB on-Die external unified L2 (16-way non-inclusive) 24.75MB on-Die shared L3 (11-way) | ? million 0.014µm process 484mm² die |
Xeon Gold 6148 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (20 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$3078} | 3647 balls 2400MHz (100x24) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 20x 32KB data (8-way) 20x 32KB instruction (8-way) 20x 1.5k µops instruction (8-way) 20x 256KB on-Die unified L2 (16-way non-inclusive) 20x 768KB on-Die external unified L2 (16-way non-inclusive) 27.5MB on-Die shared L3 (11-way) | ? million 0.014µm process 698mm² die |
Xeon Gold 6148F MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (20 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$3227} | 3647 balls 2400MHz (100x24) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 20x 32KB data (8-way) 20x 32KB instruction (8-way) 20x 1.5k µops instruction (8-way) 20x 256KB on-Die unified L2 (16-way non-inclusive) 20x 768KB on-Die external unified L2 (16-way non-inclusive) 27.5MB on-Die shared L3 (11-way) | ? million 0.014µm process 698mm² die |
Xeon Gold 6150 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (18 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$3358} | 3647 balls 2700MHz (100x27) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 18x 32KB data (8-way) 18x 32KB instruction (8-way) 18x 1.5k µops instruction (8-way) 18x 256KB on-Die unified L2 (16-way non-inclusive) 18x 768KB on-Die external unified L2 (16-way non-inclusive) 24.75MB on-Die shared L3 (11-way) | ? million 0.014µm process 484mm² die |
Xeon Gold 6152 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (22 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$3661} | 3647 balls 2100MHz (100x21) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 22x 32KB data (8-way) 22x 32KB instruction (8-way) 22x 1.5k µops instruction (8-way) 22x 256KB on-Die unified L2 (16-way non-inclusive) 22x 768KB on-Die external unified L2 (16-way non-inclusive) 30.25MB on-Die shared L3 (11-way) | ? million 0.014µm process 698mm² die |
Xeon Gold 6154 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (18 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 | 3647 balls 3000MHz (100x30) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 18x 32KB data (8-way) 18x 32KB instruction (8-way) 18x 1.5k µops instruction (8-way) 18x 256KB on-Die unified L2 (16-way non-inclusive) 18x 768KB on-Die external unified L2 (16-way non-inclusive) 24.75MB on-Die shared L3 (11-way) | ? million 0.014µm process 484mm² die |
Xeon Platinum 8153 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (16 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$3115} | 3647 balls 2000MHz (100x20) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 1.5k µops instruction (8-way) 16x 256KB on-Die unified L2 (16-way non-inclusive) 16x 768KB on-Die external unified L2 (16-way non-inclusive) 22MB on-Die shared L3 (11-way) | ? million 0.014µm process 484mm² die |
Xeon Platinum 8156 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$7007} | 3647 balls 3600MHz (100x36) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (16-way non-inclusive) 4x 768KB on-Die external unified L2 (16-way non-inclusive) 16.5MB on-Die shared L3 (11-way) | ? million 0.014µm process 322mm² die |
Xeon Platinum 8158 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (12 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$7007} | 3647 balls 3000MHz (100x30) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 12x 32KB data (8-way) 12x 32KB instruction (8-way) 12x 1.5k µops instruction (8-way) 12x 256KB on-Die unified L2 (16-way non-inclusive) 12x 768KB on-Die external unified L2 (16-way non-inclusive) 24.75MB on-Die shared L3 (11-way) | ? million 0.014µm process 484mm² die |
Xeon Platinum 8160 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (24 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$4708} | 3647 balls 2100MHz (100x21) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 24x 32KB data (8-way) 24x 32KB instruction (8-way) 24x 1.5k µops instruction (8-way) 24x 256KB on-Die unified L2 (16-way non-inclusive) 24x 768KB on-Die external unified L2 (16-way non-inclusive) 33MB on-Die shared L3 (11-way) | ? million 0.014µm process 698mm² die |
Xeon Platinum 8160F MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (24 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$4856} | 3647 balls 2100MHz (100x21) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 24x 32KB data (8-way) 24x 32KB instruction (8-way) 24x 1.5k µops instruction (8-way) 24x 256KB on-Die unified L2 (16-way non-inclusive) 24x 768KB on-Die external unified L2 (16-way non-inclusive) 33MB on-Die shared L3 (11-way) | ? million 0.014µm process 698mm² die |
Xeon Platinum 8160M MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (24 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$7707} | 3647 balls 2100MHz (100x21) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 24x 32KB data (8-way) 24x 32KB instruction (8-way) 24x 1.5k µops instruction (8-way) 24x 256KB on-Die unified L2 (16-way non-inclusive) 24x 768KB on-Die external unified L2 (16-way non-inclusive) 33MB on-Die shared L3 (11-way) | ? million 0.014µm process 698mm² die |
Xeon Platinum 8160T MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (24 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$4936} | 3647 balls 2100MHz (100x21) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 24x 32KB data (8-way) 24x 32KB instruction (8-way) 24x 1.5k µops instruction (8-way) 24x 256KB on-Die unified L2 (16-way non-inclusive) 24x 768KB on-Die external unified L2 (16-way non-inclusive) 33MB on-Die shared L3 (11-way) | ? million 0.014µm process 698mm² die |
Xeon Platinum 8164 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (26 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$6120} | 3647 balls 2000MHz (100x20) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 26x 32KB data (8-way) 26x 32KB instruction (8-way) 26x 1.5k µops instruction (8-way) 26x 256KB on-Die unified L2 (16-way non-inclusive) 26x 768KB on-Die external unified L2 (16-way non-inclusive) 35.75MB on-Die shared L3 (11-way) | ? million 0.014µm process 698mm² die |
Xeon Platinum 8168 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (24 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$5890} | 3647 balls 2700MHz (100x27) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 24x 32KB data (8-way) 24x 32KB instruction (8-way) 24x 1.5k µops instruction (8-way) 24x 256KB on-Die unified L2 (16-way non-inclusive) 24x 768KB on-Die external unified L2 (16-way non-inclusive) 33MB on-Die shared L3 (11-way) | ? million 0.014µm process 698mm² die |
Xeon Platinum 8170 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (26 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$7411} | 3647 balls 2100MHz (100x21) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 26x 32KB data (8-way) 26x 32KB instruction (8-way) 26x 1.5k µops instruction (8-way) 26x 256KB on-Die unified L2 (16-way non-inclusive) 26x 768KB on-Die external unified L2 (16-way non-inclusive) 35.75MB on-Die shared L3 (11-way) | ? million 0.014µm process 698mm² die |
Xeon Platinum 8170M MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (26 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$10409} | 3647 balls 2100MHz (100x21) (3.7GHz Turbo) (64-bit bus) ?v | Socket P | 26x 32KB data (8-way) 26x 32KB instruction (8-way) 26x 1.5k µops instruction (8-way) 26x 256KB on-Die unified L2 (16-way non-inclusive) 26x 768KB on-Die external unified L2 (16-way non-inclusive) 35.75MB on-Die shared L3 (11-way) | ? million 0.014µm process 698mm² die |
Xeon Platinum 8176 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (28 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$8719} | 3647 balls 2100MHz (100x21) (3.8GHz Turbo) (64-bit bus) ?v | Socket P | 28x 32KB data (8-way) 28x 32KB instruction (8-way) 28x 1.5k µops instruction (8-way) 28x 256KB on-Die unified L2 (16-way non-inclusive) 28x 768KB on-Die external unified L2 (16-way non-inclusive) 38.5MB on-Die shared L3 (11-way) | ? million 0.014µm process 698mm² die |
Xeon Platinum 8176F MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (28 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 | 3647 balls 2100MHz (100x21) (3.8GHz Turbo) (64-bit bus) ?v | Socket P | 28x 32KB data (8-way) 28x 32KB instruction (8-way) 28x 1.5k µops instruction (8-way) 28x 256KB on-Die unified L2 (16-way non-inclusive) 28x 768KB on-Die external unified L2 (16-way non-inclusive) 38.5MB on-Die shared L3 (11-way) | ? million 0.014µm process 698mm² die |
Xeon Platinum 8176M MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (28 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$11722} | 3647 balls 2100MHz (100x21) (3.8GHz Turbo) (64-bit bus) ?v | Socket P | 28x 32KB data (8-way) 28x 32KB instruction (8-way) 28x 1.5k µops instruction (8-way) 28x 256KB on-Die unified L2 (16-way non-inclusive) 28x 768KB on-Die external unified L2 (16-way non-inclusive) 38.5MB on-Die shared L3 (11-way) | ? million 0.014µm process 698mm² die |
Xeon Platinum 8180 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (28 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$10009} | 3647 balls 2500MHz (100x25) (3.8GHz Turbo) (64-bit bus) ?v | Socket P | 28x 32KB data (8-way) 28x 32KB instruction (8-way) 28x 1.5k µops instruction (8-way) 28x 256KB on-Die unified L2 (16-way non-inclusive) 28x 768KB on-Die external unified L2 (16-way non-inclusive) 38.5MB on-Die shared L3 (11-way) | ? million 0.014µm process 698mm² die |
Xeon Platinum 8180M MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (28 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 11, 2017 - {$13011} | 3647 balls 2500MHz (100x25) (3.8GHz Turbo) (64-bit bus) ?v | Socket P | 28x 32KB data (8-way) 28x 32KB instruction (8-way) 28x 1.5k µops instruction (8-way) 28x 256KB on-Die unified L2 (16-way non-inclusive) 28x 768KB on-Die external unified L2 (16-way non-inclusive) 38.5MB on-Die shared L3 (11-way) | ? million 0.014µm process 698mm² die |
Xeon (Skylake-SP) | ||||
---|---|---|---|---|
Intel Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
Xeon W-3175X MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Skylake-SP) 384-bit DDR4 on-Die ECC PC21333 mem controller (28 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) January 30, 2019 - {$2999} | 3647 balls 3100MHz (100x31) (3.8GHz Turbo) (64-bit bus) ?v | Socket P | 28x 32KB data (8-way) 28x 32KB instruction (8-way) 28x 1.5k µops instruction (8-way) 28x 256KB on-Die unified L2 (16-way non-inclusive) 28x 768KB on-Die external unified L2 (16-way non-inclusive) 38.5MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon E (Coffee Lake) | ||||
---|---|---|---|---|
Intel Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
Xeon E 2124 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Coffee Lake) 256-bit DDR4 on-Die PC21333 mem controller (quad core, EM64T, NX bit, VT, TXT) July 14, 2018 - {$193} | 1151 balls 3300MHz (100x33) (4.3GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E 2124G MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Coffee Lake) 256-bit DDR4 on-Die PC21333 mem controller (quad core, 1150MHz P630 GPU) (EM64T, NX bit, VT, TXT) July 14, 2018 - {$193} | 1151 balls 3400MHz (100x34) (4.5GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E 2126G MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Coffee Lake) 256-bit DDR4 on-Die PC21333 mem controller (6 cores, 1150MHz P630 GPU) (EM64T, NX bit, VT, TXT) July 14, 2018 - {$255} | 1151 balls 3300MHz (100x33) (4.5GHz Turbo) (64-bit bus) ?v | Socket 1151 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E 2134 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Coffee Lake) 256-bit DDR4 on-Die PC21333 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT) July 14, 2018 - {$250} | 1151 balls 3500MHz (100x35) (4.5GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E 2136 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Coffee Lake) 256-bit DDR4 on-Die PC21333 mem controller (6 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT) July 14, 2018 - {$284} | 1151 balls 3300MHz (100x33) (4.5GHz Turbo) (64-bit bus) ?v | Socket 1151 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E 2144G MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Coffee Lake) 256-bit DDR4 on-Die PC21333 mem controller (quad core, 1150MHz P630 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT) July 14, 2018 - {$272} | 1151 balls 3600MHz (100x36) (4.5GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E 2146G MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Coffee Lake) 256-bit DDR4 on-Die PC21333 mem controller (6 cores, 1150MHz P630 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT) July 14, 2018 - {$311} | 1151 balls 3500MHz (100x35) (4.5GHz Turbo) (64-bit bus) ?v | Socket 1151 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E 2174G MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Coffee Lake) 256-bit DDR4 on-Die PC21333 mem controller (quad core, 1200MHz P630 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT) July 14, 2018 - {$328} | 1151 balls 3800MHz (100x38) (4.7GHz Turbo) (64-bit bus) ?v | Socket 1151 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E 2176G MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Coffee Lake) 256-bit DDR4 on-Die PC21333 mem controller (6 cores, 1200MHz P630 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT) July 14, 2018 - {$362} | 1151 balls 3700MHz (100x37) (4.7GHz Turbo) (64-bit bus) ?v | Socket 1151 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon E 2186G MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Coffee Lake) 256-bit DDR4 on-Die PC21333 mem controller (6 cores, 1200MHz P630 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT) July 14, 2018 - {$450} | 1151 balls 3800MHz (100x38) (4.7GHz Turbo) (64-bit bus) ?v | Socket 1151 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon D (Hewitt Lake) | ||||
---|---|---|---|---|
Intel Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
Xeon D-1602 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Hewitt Lake) 128-bit DDR4 on-Die PC34000 mem controller (dual core, SMT Hyperthreading, EM64T, NX bit, VT, TXT) April 2, 2019 - {$106} | 1667 balls 2500MHz (100x25) (3.2GHz Turbo) (64-bit bus) ?v | BGA 1667 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 2x 1.5k µops instruction (8-way) 2x 256KB on-Die unified L2 (8-way) 3MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon D-1612 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Hewitt Lake) 128-bit DDR4 on-Die PC34000 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT) April 2, 2019 | 1667 balls 2500MHz (100x25) (3.2GHz Turbo) (64-bit bus) ?v | BGA 1667 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 6MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon D-1622 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Hewitt Lake) 128-bit DDR4 on-Die PC34000 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT) April 2, 2019 - {$170} | 1667 balls 2600MHz (100x26) (3.2GHz Turbo) (64-bit bus) ?v | BGA 1667 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 6MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon D-1623N MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Hewitt Lake) 128-bit DDR4 on-Die PC34000 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT) April 2, 2019 - {$256} | 1667 balls 2400MHz (100x24) (3.2GHz Turbo) (64-bit bus) ?v | BGA 1667 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 6MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon D-1627 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Hewitt Lake) 128-bit DDR4 on-Die PC34000 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT) April 2, 2019 - {$202} | 1667 balls 2900MHz (100x29) (3.2GHz Turbo) (64-bit bus) ?v | BGA 1667 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 256KB on-Die unified L2 (8-way) 6MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon D-1632 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Hewitt Lake) 128-bit DDR4 on-Die PC34000 mem controller (8 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT) April 2, 2019 | 1667 balls 1500MHz (100x15) (2.5GHz Turbo) (64-bit bus) ?v | BGA 1667 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon D-1633N MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Hewitt Lake) 128-bit DDR4 on-Die PC34000 mem controller (6 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT) April 2, 2019 - {$470} | 1667 balls 2500MHz (100x25) (3.2GHz Turbo) (64-bit bus) ?v | BGA 1667 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 9MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon D-1637 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Hewitt Lake) 128-bit DDR4 on-Die PC34000 mem controller (6 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT) April 2, 2019 - {$406} | 1667 balls 2900MHz (100x29) (3.2GHz Turbo) (64-bit bus) ?v | BGA 1667 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 256KB on-Die unified L2 (8-way) 9MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon D-1649N MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Hewitt Lake) 128-bit DDR4 on-Die PC34000 mem controller (8 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT) April 2, 2019 - {$705} | 1667 balls 2300MHz (100x23) (3.2GHz Turbo) (64-bit bus) ?v | BGA 1667 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon D-1653N MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 (Hewitt Lake) 128-bit DDR4 on-Die PC34000 mem controller (8 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT) April 2, 2019 - {$748} | 1667 balls 2800MHz (100x28) (3.2GHz Turbo) (64-bit bus) ?v | BGA 1667 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (16-way) | ? million 0.014µm process ?mm² die |
Xeon Scalable (Cascade Lake) | ||||
---|---|---|---|---|
Intel Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
Xeon Bronze 3204 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (6 cores, EM64T, NX bit, VT, TXT) April 2, 2019 - {$224} | 3647 balls 1900MHz (100x19) (64-bit bus) ?v | Socket 3647 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 1MB on-Die unified L2 (8-way) 8.25MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Silver 4208 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (8 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$428} | 3647 balls 2100MHz (100x21) (3.2GHz Turbo) (64-bit bus) ?v | Socket 3647 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 1MB on-Die unified L2 (8-way) 11MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Silver 4209T MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (8 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$501} | 3647 balls 2200MHz (100x22) (3.2GHz Turbo) (64-bit bus) ?v | Socket 3647 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 1MB on-Die unified L2 (8-way) 11MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Silver 4210 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (10 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$511} | 3647 balls 2200MHz (100x22) (3.2GHz Turbo) (64-bit bus) ?v | Socket 3647 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 1MB on-Die unified L2 (8-way) 13.75MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Silver 4214 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (10 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$704} | 3647 balls 2200MHz (100x22) (3.2GHz Turbo) (64-bit bus) ?v | Socket 3647 | 12x 32KB data (8-way) 12x 32KB instruction (8-way) 12x 1.5k µops instruction (8-way) 12x 1MB on-Die unified L2 (8-way) 16.5MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Silver 4214Y MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (10 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$768} | 3647 balls 2200MHz (100x22) (3.2GHz Turbo) (64-bit bus) ?v | Socket 3647 | 12x 32KB data (8-way) 12x 32KB instruction (8-way) 12x 1.5k µops instruction (8-way) 12x 1MB on-Die unified L2 (8-way) 16.5MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Silver 4215 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (8 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$794} | 3647 balls 2500MHz (100x25) (3.2GHz Turbo) (64-bit bus) ?v | Socket 3647 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 1MB on-Die unified L2 (8-way) 11MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Silver 4216 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (16 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$1012} | 3647 balls 2100MHz (100x21) (3.2GHz Turbo) (64-bit bus) ?v | Socket 3647 | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 1.5k µops instruction (8-way) 16x 1MB on-Die unified L2 (8-way) 22MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 5215 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (10 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$1221} | 3647 balls 2500MHz (100x25) (3.4GHz Turbo) (64-bit bus) ?v | Socket 3647 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 1MB on-Die unified L2 (8-way) 13.75MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 5215L MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (10 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$9119} | 3647 balls 2500MHz (100x25) (3.4GHz Turbo) (64-bit bus) ?v | Socket 3647 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 1MB on-Die unified L2 (8-way) 13.75MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 5215M MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (10 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$4224} | 3647 balls 2500MHz (100x25) (3.4GHz Turbo) (64-bit bus) ?v | Socket 3647 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 1MB on-Die unified L2 (8-way) 13.75MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 5217 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (8 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$1522} | 3647 balls 3000MHz (100x30) (3.7GHz Turbo) (64-bit bus) ?v | Socket 3647 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 1MB on-Die unified L2 (8-way) 11MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 5218 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (16 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$1280} | 3647 balls 2300MHz (100x23) (3.9GHz Turbo) (64-bit bus) ?v | Socket 3647 | 16x 32KB data (8-way) 8x 32KB instruction (8-way) 16x 1.5k µops instruction (8-way) 16x 1MB on-Die unified L2 (8-way) 22MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 5218B MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (16 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$1280} | 3647 balls 2300MHz (100x23) (3.9GHz Turbo) (64-bit bus) ?v | Socket 3647 | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 1.5k µops instruction (8-way) 16x 1MB on-Die unified L2 (8-way) 22MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 5218N MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (16 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$1375} | 3647 balls 2300MHz (100x23) (3.7GHz Turbo) (64-bit bus) ?v | Socket 3647 | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 1.5k µops instruction (8-way) 16x 1MB on-Die unified L2 (8-way) 22MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 5218T MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (16 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$1555} | 3647 balls 2100MHz (100x21) (3.8GHz Turbo) (64-bit bus) ?v | Socket 3647 | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 1.5k µops instruction (8-way) 16x 1MB on-Die unified L2 (8-way) 22MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 5220 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (18 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$1561} | 3647 balls 2200MHz (100x22) (3.9GHz Turbo) (64-bit bus) ?v | Socket 3647 | 18x 32KB data (8-way) 18x 32KB instruction (8-way) 18x 1.5k µops instruction (8-way) 18x 1MB on-Die unified L2 (8-way) 24.75MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 5220S MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (18 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$2000} | 3647 balls 2700MHz (100x27) (3.9GHz Turbo) (64-bit bus) ?v | Socket 3647 | 18x 32KB data (8-way) 18x 32KB instruction (8-way) 18x 1.5k µops instruction (8-way) 18x 1MB on-Die unified L2 (8-way) 24.75MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 5220T MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (18 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$1280} | 3647 balls 1900MHz (100x19) (3.9GHz Turbo) (64-bit bus) ?v | Socket 3647 | 18x 32KB data (8-way) 18x 32KB instruction (8-way) 18x 1.5k µops instruction (8-way) 18x 1MB on-Die unified L2 (8-way) 24.75MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 5222 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$1221} | 3647 balls 3800MHz (100x38) (3.9GHz Turbo) (64-bit bus) ?v | Socket 3647 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 1MB on-Die unified L2 (8-way) 16.5MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 6222V MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (20 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 | 3647 balls 1800MHz (100x18) (3.6GHz Turbo) (64-bit bus) ?v | Socket 3647 | 20x 32KB data (8-way) 20x 32KB instruction (8-way) 20x 1.5k µops instruction (8-way) 20x 1MB on-Die unified L2 (8-way) 27.5MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 6226 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (12 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 | 3647 balls 2700MHz (100x27) (3.7GHz Turbo) (64-bit bus) ?v | Socket 3647 | 12x 32KB data (8-way) 12x 32KB instruction (8-way) 12x 1.5k µops instruction (8-way) 12x 1MB on-Die unified L2 (8-way) 19.25MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 6230 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (20 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$1900} | 3647 balls 2100MHz (100x21) (3.9GHz Turbo) (64-bit bus) ?v | Socket 3647 | 20x 32KB data (8-way) 20x 32KB instruction (8-way) 20x 1.5k µops instruction (8-way) 20x 1MB on-Die unified L2 (8-way) 27.5MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 6230N MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (20 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$2046} | 3647 balls 2300MHz (100x23) (3.9GHz Turbo) (64-bit bus) ?v | Socket 3647 | 20x 32KB data (8-way) 20x 32KB instruction (8-way) 20x 1.5k µops instruction (8-way) 20x 1MB on-Die unified L2 (8-way) 27.5MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 6230T MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (20 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 | 3647 balls 2100MHz (100x21) (3.9GHz Turbo) (64-bit bus) ?v | Socket 3647 | 20x 32KB data (8-way) 20x 32KB instruction (8-way) 20x 1.5k µops instruction (8-way) 20x 1MB on-Die unified L2 (8-way) 27.5MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 6234 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (8 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 | 3647 balls 3300MHz (100x33) (4.0GHz Turbo) (64-bit bus) ?v | Socket 3647 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 1MB on-Die unified L2 (8-way) 24.75MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 6238 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (22 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 | 3647 balls 2100MHz (100x21) (3.7GHz Turbo) (64-bit bus) ?v | Socket 3647 | 22x 32KB data (8-way) 22x 32KB instruction (8-way) 22x 1.5k µops instruction (8-way) 22x 1MB on-Die unified L2 (8-way) 30.25MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 6238L MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (22 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 | 3647 balls 2100MHz (100x21) (3.7GHz Turbo) (64-bit bus) ?v | Socket 3647 | 22x 32KB data (8-way) 22x 32KB instruction (8-way) 22x 1.5k µops instruction (8-way) 22x 1MB on-Die unified L2 (8-way) 30.25MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 6238M MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (22 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 | 3647 balls 2100MHz (100x21) (3.7GHz Turbo) (64-bit bus) ?v | Socket 3647 | 22x 32KB data (8-way) 22x 32KB instruction (8-way) 22x 1.5k µops instruction (8-way) 22x 1MB on-Die unified L2 (8-way) 30.25MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 6238T MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (22 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$2742} | 3647 balls 1900MHz (100x19) (3.7GHz Turbo) (64-bit bus) ?v | Socket 3647 | 22x 32KB data (8-way) 22x 32KB instruction (8-way) 22x 1.5k µops instruction (8-way) 22x 1MB on-Die unified L2 (8-way) 30.25MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 6240 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (18 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$2451} | 3647 balls 2600MHz (100x26) (3.9GHz Turbo) (64-bit bus) ?v | Socket 3647 | 18x 32KB data (8-way) 18x 32KB instruction (8-way) 18x 1.5k µops instruction (8-way) 18x 1MB on-Die unified L2 (8-way) 24.75MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 6240L MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (18 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 | 3647 balls 2600MHz (100x26) (3.9GHz Turbo) (64-bit bus) ?v | Socket 3647 | 18x 32KB data (8-way) 18x 32KB instruction (8-way) 18x 1.5k µops instruction (8-way) 18x 1MB on-Die unified L2 (8-way) 24.75MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 6240M MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (18 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 | 3647 balls 2600MHz (100x26) (3.9GHz Turbo) (64-bit bus) ?v | Socket 3647 | 18x 32KB data (8-way) 18x 32KB instruction (8-way) 18x 1.5k µops instruction (8-way) 18x 1MB on-Die unified L2 (8-way) 24.75MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 6240Y MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (18 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$2726} | 3647 balls 2600MHz (100x26) (3.9GHz Turbo) (64-bit bus) ?v | Socket 3647 | 18x 32KB data (8-way) 18x 32KB instruction (8-way) 18x 1.5k µops instruction (8-way) 18x 1MB on-Die unified L2 (8-way) 24.75MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 6242 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (16 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$2537} | 3647 balls 2800MHz (100x28) (3.9GHz Turbo) (64-bit bus) ?v | Socket 3647 | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 1.5k µops instruction (8-way) 16x 1MB on-Die unified L2 (8-way) 22MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 6244 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (8 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$2925} | 3647 balls 3600MHz (100x36) (4.4GHz Turbo) (64-bit bus) ?v | Socket 3647 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 1MB on-Die unified L2 (8-way) 24.75MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 6246 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (12 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 | 3647 balls 3300MHz (100x33) (4.2GHz Turbo) (64-bit bus) ?v | Socket 3647 | 12x 32KB data (8-way) 12x 32KB instruction (8-way) 12x 1.5k µops instruction (8-way) 12x 1MB on-Die unified L2 (8-way) 19.25MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 6248 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (20 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$3078} | 3647 balls 2500MHz (100x25) (3.9GHz Turbo) (64-bit bus) ?v | Socket 3647 | 20x 32KB data (8-way) 20x 32KB instruction (8-way) 20x 1.5k µops instruction (8-way) 20x 1MB on-Die unified L2 (8-way) 27.5MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 6252 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (24 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$3662} | 3647 balls 2100MHz (100x21) (3.7GHz Turbo) (64-bit bus) ?v | Socket 3647 | 24x 32KB data (8-way) 24x 32KB instruction (8-way) 24x 1.5k µops instruction (8-way) 24x 1MB on-Die unified L2 (8-way) 35.75MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 6252N MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (24 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 | 3647 balls 2300MHz (100x23) (3.6GHz Turbo) (64-bit bus) ?v | Socket 3647 | 24x 32KB data (8-way) 24x 32KB instruction (8-way) 24x 1.5k µops instruction (8-way) 24x 1MB on-Die unified L2 (8-way) 35.75MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 6254 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (18 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$3803} | 3647 balls 3100MHz (100x31) (4.0GHz Turbo) (64-bit bus) ?v | Socket 3647 | 18x 32KB data (8-way) 18x 32KB instruction (8-way) 18x 1.5k µops instruction (8-way) 18x 1MB on-Die unified L2 (8-way) 24.75MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Gold 6262V MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (24 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 | 3647 balls 1900MHz (100x19) (3.6GHz Turbo) (64-bit bus) ?v | Socket 3647 | 24x 32KB data (8-way) 24x 32KB instruction (8-way) 24x 1.5k µops instruction (8-way) 24x 1MB on-Die unified L2 (8-way) 35.75MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Platinum 8253 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (16 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$3115} | 3647 balls 2200MHz (100x22) (3.8GHz Turbo) (64-bit bus) ?v | Socket 3647 | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 1.5k µops instruction (8-way) 16x 1MB on-Die unified L2 (8-way) 22MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Platinum 8256 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$7014} | 3647 balls 3800MHz (100x38) (3.9GHz Turbo) (64-bit bus) ?v | Socket 3647 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 1MB on-Die unified L2 (8-way) 16.5MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Platinum 8260 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (24 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$4702} | 3647 balls 2400MHz (100x24) (3.9GHz Turbo) (64-bit bus) ?v | Socket 3647 | 24x 32KB data (8-way) 24x 32KB instruction (8-way) 24x 1.5k µops instruction (8-way) 24x 1MB on-Die unified L2 (8-way) 35.75MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Platinum 8260L MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (24 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$12599} | 3647 balls 2400MHz (100x24) (3.9GHz Turbo) (64-bit bus) ?v | Socket 3647 | 24x 32KB data (8-way) 24x 32KB instruction (8-way) 24x 1.5k µops instruction (8-way) 24x 1MB on-Die unified L2 (8-way) 35.75MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Platinum 8260M MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (24 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$7705} | 3647 balls 2400MHz (100x24) (3.9GHz Turbo) (64-bit bus) ?v | Socket 3647 | 24x 32KB data (8-way) 24x 32KB instruction (8-way) 24x 1.5k µops instruction (8-way) 24x 1MB on-Die unified L2 (8-way) 35.75MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Platinum 8260Y MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (24 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$5320} | 3647 balls 2400MHz (100x24) (3.9GHz Turbo) (64-bit bus) ?v | Socket 3647 | 24x 32KB data (8-way) 24x 32KB instruction (8-way) 24x 1.5k µops instruction (8-way) 24x 1MB on-Die unified L2 (8-way) 35.75MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Platinum 8268 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (24 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$6302} | 3647 balls 2900MHz (100x29) (3.9GHz Turbo) (64-bit bus) ?v | Socket 3647 | 24x 32KB data (8-way) 24x 32KB instruction (8-way) 24x 1.5k µops instruction (8-way) 24x 1MB on-Die unified L2 (8-way) 35.75MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Platinum 8270 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (26 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$7405} | 3647 balls 2700MHz (100x27) (4.0GHz Turbo) (64-bit bus) ?v | Socket 3647 | 26x 32KB data (8-way) 26x 32KB instruction (8-way) 26x 1.5k µops instruction (8-way) 26x 1MB on-Die unified L2 (8-way) 35.75MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Platinum 8276 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (28 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$8719} | 3647 balls 2200MHz (100x22) (4.0GHz Turbo) (64-bit bus) ?v | Socket 3647 | 28x 32KB data (8-way) 28x 32KB instruction (8-way) 28x 1.5k µops instruction (8-way) 28x 1MB on-Die unified L2 (8-way) 38.5MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Platinum 8276L MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (28 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$16616} | 3647 balls 2200MHz (100x22) (4.0GHz Turbo) (64-bit bus) ?v | Socket 3647 | 28x 32KB data (8-way) 28x 32KB instruction (8-way) 28x 1.5k µops instruction (8-way) 28x 1MB on-Die unified L2 (8-way) 38.5MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Platinum 8276M MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (28 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$11722} | 3647 balls 2200MHz (100x22) (4.0GHz Turbo) (64-bit bus) ?v | Socket 3647 | 28x 32KB data (8-way) 28x 32KB instruction (8-way) 28x 1.5k µops instruction (8-way) 28x 1MB on-Die unified L2 (8-way) 38.5MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Platinum 8280 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (28 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$10009} | 3647 balls 2700MHz (100x27) (4.0GHz Turbo) (64-bit bus) ?v | Socket 3647 | 28x 32KB data (8-way) 28x 32KB instruction (8-way) 28x 1.5k µops instruction (8-way) 28x 1MB on-Die unified L2 (8-way) 38.5MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Platinum 8280L MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (28 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$17906} | 3647 balls 2700MHz (100x27) (4.0GHz Turbo) (64-bit bus) ?v | Socket 3647 | 28x 32KB data (8-way) 28x 32KB instruction (8-way) 28x 1.5k µops instruction (8-way) 28x 1MB on-Die unified L2 (8-way) 38.5MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Platinum 8280M MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (28 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 - {$13012} | 3647 balls 2700MHz (100x27) (4.0GHz Turbo) (64-bit bus) ?v | Socket 3647 | 28x 32KB data (8-way) 28x 32KB instruction (8-way) 28x 1.5k µops instruction (8-way) 28x 1MB on-Die unified L2 (8-way) 38.5MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Platinum 9242 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (48 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 | 3647 balls 2300MHz (100x23) (3.8GHz Turbo) (64-bit bus) ?v | Socket 3647 | 48x 32KB data (8-way) 48x 32KB instruction (8-way) 48x 1.5k µops instruction (8-way) 48x 1MB on-Die unified L2 (8-way) 71.5MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Platinum 9282 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Cascade Lake) 384-bit DDR4 on-Die PC34000 mem controller (56 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 2, 2019 | 3647 balls 2600MHz (100x26) (3.8GHz Turbo) (64-bit bus) ?v | Socket 3647 | 56x 32KB data (8-way) 56x 32KB instruction (8-way) 56x 1.5k µops instruction (8-way) 56x 1MB on-Die unified L2 (8-way) 77MB on-Die shared L3 (11-way) | ? million 0.014µm process ?mm² die |
Xeon Scalable (Ice Lake) | ||||
---|---|---|---|---|
Intel Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
Xeon Silver 4309Y MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC21333 mem controller (8 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 | 4189 balls 2800MHz (100x28) (3.6GHz Turbo) (64-bit bus) ?v | Socket 4189 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 1MB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Silver 4310 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC21333 mem controller (12 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 | 4189 balls 2100MHz (100x21) (3.3GHz Turbo) (64-bit bus) ?v | Socket 4189 | 12x 32KB data (8-way) 12x 32KB instruction (8-way) 12x 1.5k µops instruction (8-way) 12x 1MB on-Die unified L2 (8-way) 18MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Silver 4310T MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC21333 mem controller (10 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 | 4189 balls 2300MHz (100x23) (3.4GHz Turbo) (64-bit bus) ?v | Socket 4189 | 10x 32KB data (8-way) 10x 32KB instruction (8-way) 10x 1.5k µops instruction (8-way) 10x 1MB on-Die unified L2 (8-way) 15MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Silver 4314 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC21333 mem controller (16 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 | 4189 balls 2400MHz (100x24) (3.4GHz Turbo) (64-bit bus) ?v | Socket 4189 | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 1.5k µops instruction (8-way) 16x 1MB on-Die unified L2 (8-way) 24MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Silver 4316 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC21333 mem controller (20 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 | 4189 balls 2300MHz (100x23) (3.4GHz Turbo) (64-bit bus) ?v | Socket 4189 | 20x 32KB data (8-way) 20x 32KB instruction (8-way) 20x 1.5k µops instruction (8-way) 20x 1MB on-Die unified L2 (8-way) 30MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Gold 5315Y MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC23466 mem controller (8 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 | 4189 balls 3200MHz (100x32) (3.6GHz Turbo) (64-bit bus) ?v | Socket 4189 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 1MB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Gold 5317 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC23466 mem controller (12 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 | 4189 balls 3000MHz (100x30) (3.6GHz Turbo) (64-bit bus) ?v | Socket 4189 | 12x 32KB data (8-way) 12x 32KB instruction (8-way) 12x 1.5k µops instruction (8-way) 12x 1MB on-Die unified L2 (8-way) 18MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Gold 5318N MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC21333 mem controller (24 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 | 4189 balls 2100MHz (100x21) (3.4GHz Turbo) (64-bit bus) ?v | Socket 4189 | 24x 32KB data (8-way) 24x 32KB instruction (8-way) 24x 1.5k µops instruction (8-way) 24x 1MB on-Die unified L2 (8-way) 36MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Gold 5318S MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC23466 mem controller (24 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 | 4189 balls 2100MHz (100x21) (3.4GHz Turbo) (64-bit bus) ?v | Socket 4189 | 24x 32KB data (8-way) 24x 32KB instruction (8-way) 24x 1.5k µops instruction (8-way) 24x 1MB on-Die unified L2 (8-way) 36MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Gold 5318Y MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC23466 mem controller (24 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 | 4189 balls 2100MHz (100x21) (3.4GHz Turbo) (64-bit bus) ?v | Socket 4189 | 24x 32KB data (8-way) 24x 32KB instruction (8-way) 24x 1.5k µops instruction (8-way) 24x 1MB on-Die unified L2 (8-way) 36MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Gold 5320 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC23466 mem controller (26 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 | 4189 balls 2200MHz (100x22) (3.4GHz Turbo) (64-bit bus) ?v | Socket 4189 | 26x 32KB data (8-way) 26x 32KB instruction (8-way) 26x 1.5k µops instruction (8-way) 26x 1MB on-Die unified L2 (8-way) 39MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Gold 5320T MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC23466 mem controller (20 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 | 4189 balls 2300MHz (100x23) (3.5GHz Turbo) (64-bit bus) ?v | Socket 4189 | 20x 32KB data (8-way) 20x 32KB instruction (8-way) 20x 1.5k µops instruction (8-way) 20x 1MB on-Die unified L2 (8-way) 30MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Gold 6312U MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC25600 mem controller (24 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 | 4189 balls 2400MHz (100x24) (3.6GHz Turbo) (64-bit bus) ?v | Socket 4189 | 24x 32KB data (8-way) 24x 32KB instruction (8-way) 24x 1.5k µops instruction (8-way) 24x 1MB on-Die unified L2 (8-way) 36MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Gold 6314U MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC25600 mem controller (32 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 | 4189 balls 2300MHz (100x23) (3.4GHz Turbo) (64-bit bus) ?v | Socket 4189 | 32x 32KB data (8-way) 32x 32KB instruction (8-way) 32x 1.5k µops instruction (8-way) 32x 1MB on-Die unified L2 (8-way) 48MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Gold 6326 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC25600 mem controller (16 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 | 4189 balls 2900MHz (100x29) (3.5GHz Turbo) (64-bit bus) ?v | Socket 4189 | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 1.5k µops instruction (8-way) 16x 1MB on-Die unified L2 (8-way) 24MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Gold 6330 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC25600 mem controller (28 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 | 4189 balls 2000MHz (100x20) (3.1GHz Turbo) (64-bit bus) ?v | Socket 4189 | 28x 32KB data (8-way) 28x 32KB instruction (8-way) 28x 1.5k µops instruction (8-way) 28x 1MB on-Die unified L2 (8-way) 42MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Gold 6330N MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC25600 mem controller (28 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 - {$2029} | 4189 balls 2200MHz (100x22) (3.4GHz Turbo) (64-bit bus) ?v | Socket 4189 | 28x 32KB data (8-way) 28x 32KB instruction (8-way) 28x 1.5k µops instruction (8-way) 28x 1MB on-Die unified L2 (8-way) 42MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Gold 6334 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC25600 mem controller (8 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 | 4189 balls 3600MHz (100x36) (3.7GHz Turbo) (64-bit bus) ?v | Socket 4189 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 1MB on-Die unified L2 (8-way) 18MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Gold 6336Y MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC25600 mem controller (24 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 | 4189 balls 2400MHz (100x24) (3.6GHz Turbo) (64-bit bus) ?v | Socket 4189 | 24x 32KB data (8-way) 24x 32KB instruction (8-way) 24x 1.5k µops instruction (8-way) 24x 1MB on-Die unified L2 (8-way) 36MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Gold 6338 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC25600 mem controller (32 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 | 4189 balls 2000MHz (100x20) (3.2GHz Turbo) (64-bit bus) ?v | Socket 4189 | 32x 32KB data (8-way) 32x 32KB instruction (8-way) 32x 1.5k µops instruction (8-way) 32x 1MB on-Die unified L2 (8-way) 48MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Gold 6338N MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC25600 mem controller (32 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 - {$2795} | 4189 balls 2200MHz (100x22) (3.5GHz Turbo) (64-bit bus) ?v | Socket 4189 | 32x 32KB data (8-way) 32x 32KB instruction (8-way) 32x 1.5k µops instruction (8-way) 32x 1MB on-Die unified L2 (8-way) 48MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Gold 6338T MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC25600 mem controller (24 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 | 4189 balls 2100MHz (100x21) (3.4GHz Turbo) (64-bit bus) ?v | Socket 4189 | 24x 32KB data (8-way) 24x 32KB instruction (8-way) 24x 1.5k µops instruction (8-way) 24x 1MB on-Die unified L2 (8-way) 36MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Gold 6342 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC25600 mem controller (24 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 | 4189 balls 2800MHz (100x28) (3.5GHz Turbo) (64-bit bus) ?v | Socket 4189 | 24x 32KB data (8-way) 24x 32KB instruction (8-way) 24x 1.5k µops instruction (8-way) 24x 1MB on-Die unified L2 (8-way) 36MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Gold 6346 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC25600 mem controller (16 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 - {$2300} | 4189 balls 3100MHz (100x31) (3.6GHz Turbo) (64-bit bus) ?v | Socket 4189 | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 1.5k µops instruction (8-way) 16x 1MB on-Die unified L2 (8-way) 36MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Gold 6348 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC25600 mem controller (28 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 - {$3072} | 4189 balls 2600MHz (100x26) (3.5GHz Turbo) (64-bit bus) ?v | Socket 4189 | 28x 32KB data (8-way) 28x 32KB instruction (8-way) 28x 1.5k µops instruction (8-way) 28x 1MB on-Die unified L2 (8-way) 42MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Gold 6354 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC25600 mem controller (18 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 - {$2445} | 4189 balls 3000MHz (100x30) (3.6GHz Turbo) (64-bit bus) ?v | Socket 4189 | 18x 32KB data (8-way) 18x 32KB instruction (8-way) 18x 1.5k µops instruction (8-way) 18x 1MB on-Die unified L2 (8-way) 39MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Platinum 8351N MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC23466 mem controller (36 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 - {$3027} | 4189 balls 2400MHz (100x24) (3.5GHz Turbo) (64-bit bus) ?v | Socket 4189 | 36x 32KB data (8-way) 36x 32KB instruction (8-way) 36x 1.5k µops instruction (8-way) 36x 1MB on-Die unified L2 (8-way) 54MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Platinum 8352S MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC25600 mem controller (32 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 - {$4046} | 4189 balls 2200MHz (100x22) (3.4GHz Turbo) (64-bit bus) ?v | Socket 4189 | 32x 32KB data (8-way) 32x 32KB instruction (8-way) 32x 1.5k µops instruction (8-way) 32x 1MB on-Die unified L2 (8-way) 48MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Platinum 8352V MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC23466 mem controller (36 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 - {$3450} | 4189 balls 2100MHz (100x21) (3.5GHz Turbo) (64-bit bus) ?v | Socket 4189 | 36x 32KB data (8-way) 36x 32KB instruction (8-way) 36x 1.5k µops instruction (8-way) 36x 1MB on-Die unified L2 (8-way) 54MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Platinum 8352Y MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC25600 mem controller (32 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 - {$3450} | 4189 balls 2200MHz (100x22) (3.4GHz Turbo) (64-bit bus) ?v | Socket 4189 | 32x 32KB data (8-way) 32x 32KB instruction (8-way) 32x 1.5k µops instruction (8-way) 32x 1MB on-Die unified L2 (8-way) 48MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Platinum 8358 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC25600 mem controller (32 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 - {$3950} | 4189 balls 2600MHz (100x26) (3.4GHz Turbo) (64-bit bus) ?v | Socket 4189 | 32x 32KB data (8-way) 32x 32KB instruction (8-way) 32x 1.5k µops instruction (8-way) 32x 1MB on-Die unified L2 (8-way) 48MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Platinum 8358P MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC25600 mem controller (32 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 - {$3950} | 4189 balls 2600MHz (100x26) (3.4GHz Turbo) (64-bit bus) ?v | Socket 4189 | 32x 32KB data (8-way) 32x 32KB instruction (8-way) 32x 1.5k µops instruction (8-way) 32x 1MB on-Die unified L2 (8-way) 48MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Platinum 8360Y MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC25600 mem controller (36 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 - {$4702} | 4189 balls 2400MHz (100x24) (3.5GHz Turbo) (64-bit bus) ?v | Socket 4189 | 36x 32KB data (8-way) 36x 32KB instruction (8-way) 36x 1.5k µops instruction (8-way) 36x 1MB on-Die unified L2 (8-way) 54MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Platinum 8368 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC25600 mem controller (38 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 - {$6302} | 4189 balls 2400MHz (100x24) (3.4GHz Turbo) (64-bit bus) ?v | Socket 4189 | 38x 32KB data (8-way) 38x 32KB instruction (8-way) 38x 1.5k µops instruction (8-way) 38x 1MB on-Die unified L2 (8-way) 57MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Platinum 8368Q MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC25600 mem controller (38 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 - {$6743} | 4189 balls 2600MHz (100x26) (3.7GHz Turbo) (64-bit bus) ?v | Socket 4189 | 38x 32KB data (8-way) 38x 32KB instruction (8-way) 38x 1.5k µops instruction (8-way) 38x 1MB on-Die unified L2 (8-way) 57MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon Platinum 8380 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC25600 mem controller (40 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) April 5, 2021 - {$8099} | 4189 balls 2300MHz (100x23) (3.4GHz Turbo) (64-bit bus) ?v | Socket 4189 | 40x 32KB data (8-way) 40x 32KB instruction (8-way) 40x 1.5k µops instruction (8-way) 40x 1MB on-Die unified L2 (8-way) 60MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon W-3323 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC25600 mem controller (12 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 29, 2021 - {$949} | 4189 balls 3500MHz (100x35) (3.9GHz Turbo) (64-bit bus) ?v | Socket 4189 | 12x 32KB data (8-way) 12x 32KB instruction (8-way) 12x 1.5k µops instruction (8-way) 12x 1MB on-Die unified L2 (8-way) 21MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon W-3335 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC25600 mem controller (16 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 29, 2021 - {$1299} | 4189 balls 3400MHz (100x34) (4.0GHz Turbo) (64-bit bus) ?v | Socket 4189 | 16x 32KB data (8-way) 16x 32KB instruction (8-way) 16x 1.5k µops instruction (8-way) 16x 1MB on-Die unified L2 (8-way) 24MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon W-3345 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC25600 mem controller (24 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 29, 2021 - {$2499} | 4189 balls 3000MHz (100x30) (4.0GHz Turbo) (64-bit bus) ?v | Socket 4189 | 24x 32KB data (8-way) 24x 32KB instruction (8-way) 24x 1.5k µops instruction (8-way) 24x 1MB on-Die unified L2 (8-way) 36MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon W-3365 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC25600 mem controller (32 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 29, 2021 - {$3499} | 4189 balls 2700MHz (100x27) (4.0GHz Turbo) (64-bit bus) ?v | Socket 4189 | 32x 32KB data (8-way) 32x 32KB instruction (8-way) 32x 1.5k µops instruction (8-way) 32x 1MB on-Die unified L2 (8-way) 48MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon W-3375 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Ice Lake) 512-bit ECC DDR4 on-Die PC25600 mem controller (38 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) July 29, 2021 - {$4499} | 4189 balls 2500MHz (100x25) (4.0GHz Turbo) (64-bit bus) ?v | Socket 4189 | 38x 32KB data (8-way) 38x 32KB instruction (8-way) 38x 1.5k µops instruction (8-way) 38x 1MB on-Die unified L2 (8-way) 57MB on-Die shared L3 (?-way) | ? million 0.010µm process ?mm² die |
Xeon (Rocket Lake) | ||||
---|---|---|---|---|
Intel Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
Xeon W-1350 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Rocket Lake) 256-bit DDR4 on-Die ECC PC25600 mem controller (6 cores, 1300MHz P750 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) May 9, 2021 - {$258} | 1200 balls 3300MHz (100x33) (5.0GHz Turbo) (64-bit bus) ?v | Socket 1200 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 512KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon W-1350P MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Rocket Lake) 256-bit DDR4 on-Die ECC PC25600 mem controller (6 cores, 1300MHz P750 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) May 9, 2021 - {$315} | 1200 balls 4000MHz (100x40) (5.1GHz Turbo) (64-bit bus) ?v | Socket 1200 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 512KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon W-1370 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Rocket Lake) 256-bit DDR4 on-Die ECC PC25600 mem controller (8 cores, 1300MHz P750 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) May 9, 2021 - {$365} | 1200 balls 2900MHz (100x29) (5.1GHz Turbo) (64-bit bus) ?v | Socket 1200 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 512KB on-Die unified L2 (8-way) 16MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon W-1370P MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Rocket Lake) 256-bit DDR4 on-Die ECC PC25600 mem controller (8 cores, 1300MHz P750 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) May 9, 2021 - {$431} | 1200 balls 3600MHz (100x36) (5.2GHz Turbo) (64-bit bus) ?v | Socket 1200 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 512KB on-Die unified L2 (8-way) 16MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon W-1380 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Rocket Lake) 256-bit DDR4 on-Die ECC PC25600 mem controller (8 cores, 1300MHz P750 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) May 9, 2021 - {$498} | 1200 balls 2800MHz (100x28) (5.2GHz Turbo) (64-bit bus) ?v | Socket 1200 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 512KB on-Die unified L2 (8-way) 16MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon W-1380P MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Rocket Lake) 256-bit DDR4 on-Die ECC PC25600 mem controller (8 cores, 1300MHz P750 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) May 9, 2021 - {$539} | 1200 balls 3500MHz (100x35) (5.3GHz Turbo) (64-bit bus) ?v | Socket 1200 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 512KB on-Die unified L2 (8-way) 16MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon W-1380T MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Rocket Lake) 256-bit DDR4 on-Die ECC PC25600 mem controller (8 cores, 1300MHz P750 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) May 9, 2021 - {$494} | 1200 balls 1500MHz (100x15) (4.9GHz Turbo) (64-bit bus) ?v | Socket 1200 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 512KB on-Die unified L2 (8-way) 16MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E-2314 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Rocket Lake) 256-bit DDR4 on-Die ECC PC25600 mem controller (quad core, EM64T, NX bit, VT, TXT, Turbo) September 8, 2021 - {$182} | 1200 balls 2800MHz (100x28) (4.5GHz Turbo) (64-bit bus) ?v | Socket 1200 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 512KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E-2324G MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Rocket Lake) 256-bit DDR4 on-Die ECC PC25600 mem controller (quad core, 1300MHz P750 GPU) (EM64T, NX bit, VT, TXT, Turbo) September 8, 2021 - {$219} | 1200 balls 3100MHz (100x31) (4.6GHz Turbo) (64-bit bus) ?v | Socket 1200 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 512KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E-2334 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Rocket Lake) 256-bit DDR4 on-Die ECC PC25600 mem controller (quad core, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 8, 2021 - {$261} | 1200 balls 3400MHz (100x34) (4.8GHz Turbo) (64-bit bus) ?v | Socket 1200 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 512KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E-2336 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Rocket Lake) 256-bit DDR4 on-Die ECC PC25600 mem controller (6 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 8, 2021 - {$294} | 1200 balls 2900MHz (100x29) (4.8GHz Turbo) (64-bit bus) ?v | Socket 1200 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 512KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E-2356G MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Rocket Lake) 256-bit DDR4 on-Die ECC PC25600 mem controller (6 cores, 1300MHz P750 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 8, 2021 - {$311} | 1200 balls 3200MHz (100x32) (5.0GHz Turbo) (64-bit bus) ?v | Socket 1200 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 512KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E-2374G MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Rocket Lake) 256-bit DDR4 on-Die ECC PC25600 mem controller (quad core, 1300MHz P750 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 8, 2021 - {$345} | 1200 balls 3700MHz (100x37) (5.0GHz Turbo) (64-bit bus) ?v | Socket 1200 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 4x 1.5k µops instruction (8-way) 4x 512KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E-2378 MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Rocket Lake) 256-bit DDR4 on-Die ECC PC25600 mem controller (8 cores, SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 8, 2021 - {$362} | 1200 balls 2600MHz (100x26) (4.8GHz Turbo) (64-bit bus) ?v | Socket 1200 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 512KB on-Die unified L2 (8-way) 16MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E-2378G MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Rocket Lake) 256-bit DDR4 on-Die ECC PC25600 mem controller (8 cores, 1300MHz P750 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 8, 2021 - {$505} | 1200 balls 2800MHz (100x28) (5.1GHz Turbo) (64-bit bus) ?v | Socket 1200 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 512KB on-Die unified L2 (8-way) 16MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E-2386G MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Rocket Lake) 256-bit DDR4 on-Die ECC PC25600 mem controller (6 cores, 1300MHz P750 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 8, 2021 - {$450} | 1200 balls 3500MHz (100x35) (5.1GHz Turbo) (64-bit bus) ?v | Socket 1200 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 6x 1.5k µops instruction (8-way) 6x 512KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Xeon E-2388G MMX SSE SSE2 SSE3 SSE4.2 AVX AVX2 AVX-512 (Rocket Lake) 256-bit DDR4 on-Die ECC PC25600 mem controller (8 cores, 1300MHz P750 GPU) (SMT Hyperthreading, EM64T, NX bit, VT, TXT, Turbo) September 8, 2021 - {$539} | 1200 balls 3200MHz (100x32) (5.1GHz Turbo) (64-bit bus) ?v | Socket 1200 | 8x 32KB data (8-way) 8x 32KB instruction (8-way) 8x 1.5k µops instruction (8-way) 8x 512KB on-Die unified L2 (8-way) 16MB on-Die shared L3 (?-way) | ? million 0.014µm process ?mm² die |
Itanium | ||||
---|---|---|---|---|
Intel Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
Itanium 733 MMX SSE (Merced) July, 2001 | 418 pins 733MHz (133x5.5) (64-bit dual-pumped bus) ?v | PAC418 | 16KB data (4-way) 16KB instruction (4-way) 96KB on-Die unified L2 (6-way) 2MB or 4MB unified L3 (4-way) | 25 million 0.18µm process ~300mm² die ? million L3 {?µm - ?mm²} (2MB) 295 million L3 {?µm - ?mm²} (4MB) |
Itanium 800 MMX SSE (Merced) July, 2001 | 418 pins 800MHz (133x6.0) (64-bit dual-pumped bus) ?v | PAC418 | 16KB data (4-way) 16KB instruction (4-way) 96KB on-Die unified L2 (6-way) 2MB or 4MB unified L3 (4-way) | 25 million 0.18µm process ~300mm² die ? million L3 {?µm - ?mm²} (2MB) 295 million L3 {?µm - ?mm²} (4MB) |
Itanium 2 900 MMX SSE (McKinley) July 8, 2002 - {$1338} (1.5MB) | 611 pins 900MHz (200x4.5) (128-bit dual-pumped bus) ?v | PAC611 | 16KB data 16KB instruction 256KB on-Die unified L2 1.5MB on-Die unified L3 | 221 million 0.18µm process 463mm² die |
Itanium 2 1.0G MMX SSE (McKinley) July 8, 2002 - {$?} (1.5MB) July 8, 2002 - {$4226} (3MB) | 611 pins 1000MHz (200x5.0) (128-bit dual-pumped bus) ?v | PAC611 | 16KB data 16KB instruction 256KB on-Die unified L2 1.5MB or 3MB on-Die unified L3 | 221 million 0.18µm process 463mm² die |
Itanium 2 1.3G MMX SSE (Madison) - copper chip June 30, 2003 - {$1338} | 611 pins 1300MHz (200x6.5) (128-bit dual-pumped bus) ?v | PAC611 | 16KB data 16KB instruction 256KB on-Die unified L2 3MB on-Die unified L3 | ~500 million 0.13µm process ?mm² die |
Itanium 2 1.4G MMX SSE (Madison) - copper chip June 30, 2003 - {$2247} | 611 pins 1400MHz (200x7.0) (128-bit dual-pumped bus) ?v | PAC611 | 16KB data 16KB instruction 256KB on-Die unified L2 4MB on-Die unified L3 | ~500 million 0.13µm process ?mm² die |
Itanium 2 1.5G MMX SSE (Madison) - copper chip June 30, 2003 - {$3692} (6MB) November, 2004 (4MB) | 611 pins 1500MHz (200x7.5) (128-bit dual-pumped bus) ?v | PAC611 | 16KB data 16KB instruction 256KB on-Die unified L2 4MB or 6MB on-Die unified L3 | ~500 million 0.13µm process ?mm² die |
Itanium 2 1.6G MMX SSE (Madison 9M) November, 2004 | 611 pins 1600MHz (200x8.0) (128-bit dual-pumped bus) ?v | PAC611 | 16KB data 16KB instruction 256KB on-Die unified L2 6MB or 9MB on-Die unified L3 | 592 million 0.13µm process 432mm² die |
Itanium 2 1.66G MMX SSE (Madison 9M) July, 2005 | 611 pins 1666MHz (333x5.0) (128-bit dual-pumped bus) ?v | PAC611 | 16KB data 16KB instruction 256KB on-Die unified L2 6MB or 9MB on-Die unified L3 | 592 million 0.13µm process 432mm² die |
LV Itanium 2 1.0G MMX SSE (Deerfield) September 8, 2003 - {$744} | 611 pins 1000MHz (200x5.0) (128-bit dual-pumped bus) ?v | PAC611 | 16KB data 16KB instruction 256KB on-Die unified L2 1.5MB on-Die unified L3 | 410 million 0.13µm process 374mm² die |
Itanium 2 1.4G MMX SSE (Deerfield) September 8, 2003 - {$1172} | 611 pins 1400MHz (200x7.0) (128-bit dual-pumped bus) ?v | PAC611 | 16KB data 16KB instruction 256KB on-Die unified L2 1.5MBon-Die unified L3 | 410 million 0.13µm process 374mm² die |
LV Itanium 2 1.3G MMX SSE (Fanwood) November, 2004 | 611 pins 1300MHz (200x6.5) (128-bit dual-pumped bus) ?v | PAC611 | 16KB data 16KB instruction 256KB on-Die unified L2 3MB on-Die unified L3 | ? million 0.13µm process ?mm² die |
Itanium 2 1.4G MMX SSE (Fanwood) April 13, 2004 - {$1172} (3MB) | 611 pins 1400MHz (200x7.0) (128-bit dual-pumped bus) ?v | PAC611 | 16KB data 16KB instruction 256KB on-Die unified L2 3MB on-Die unified L3 | ? million 0.13µm process ?mm² die |
Itanium 2 1.6G MMX SSE (Fanwood) May, 2004 - {$2408} | 611 pins 1600MHz (200x8.0) (128-bit dual-pumped bus) ?v | PAC611 | 16KB data 16KB instruction 256KB on-Die unified L2 3MB on-Die unified L3 | ? million 0.13µm process ?mm² die |
Itanium 2 1.6G MMX SSE (Fanwood) November, 2004 - {$2408} | 611 pins 1600MHz (266x6.0) (128-bit dual-pumped bus) ?v | PAC611 | 16KB data 16KB instruction 256KB on-Die unified L2 3MB on-Die unified L3 | ? million 0.13µm process ?mm² die |
Itanium 9010 MMX SSE (Montecito) (Jackson Hyperthreading, VT) July 18, 2006 - {$696} | 611 pins 1600MHz (266x6.0) (128-bit dual-pumped bus) ?v | PAC611 | ?KB data ?KB instruction 1MB on-Die unified L2 6MB on-Die unified L3 | 1720 million 0.09µm process 596mm² die |
Itanium 9015 MMX SSE (Montecito) (dual core, Jackson Hyperthreading, VT) July 18, 2006 - {$749} | 611 pins 1400MHz (200x7.0) (128-bit dual-pumped bus) ?v | PAC611 | 2x ?KB data 2x ?KB instruction 2x 1MB on-Die unified L2 2x 6MB on-Die unified L3 | 1720 million 0.09µm process 596mm² die |
Itanium 9020 MMX SSE (Montecito) (dual core, Jackson Hyperthreading, VT) July 18, 2006 - {$910} | 611 pins 1420MHz (266x?) (128-bit dual-pumped bus) ?v | PAC611 | 2x ?KB data 2x ?KB instruction 2x 1MB on-Die unified L2 2x 6MB on-Die unified L3 | 1720 million 0.09µm process 596mm² die |
Itanium 9030 MMX SSE (Montecito) (dual core, Jackson Hyperthreading, VT) July 18, 2006 - {$1552} | 611 pins 1600MHz (266x6.0) (128-bit dual-pumped bus) ?v | PAC611 | 2x ?KB data 2x ?KB instruction 2x 1MB on-Die unified L2 2x 4MB on-Die unified L3 | 1720 million 0.09µm process 596mm² die |
Itanium 9040 MMX SSE (Montecito) (dual core, Jackson Hyperthreading, VT) July 18, 2006 - {$1980} | 611 pins 1600MHz (266x6.0) (128-bit dual-pumped bus) ?v | PAC611 | 2x ?KB data 2x ?KB instruction 2x 1MB on-Die unified L2 2x 9MB on-Die unified L3 | 1720 million 0.09µm process 596mm² die |
Itanium 9050 MMX SSE (Montecito) (dual core, Jackson Hyperthreading, VT) July 18, 2006 - {$3692} | 611 pins 1600MHz (266x6.0) (128-bit dual-pumped bus) ?v | PAC611 | 2x ?KB data 2x ?KB instruction 2x 1MB on-Die unified L2 2x 12MB on-Die unified L3 | 1720 million 0.09µm process 596mm² die |
Itanium 9110N MMX SSE (Montvale) (Jackson Hyperthreading, VT) October 31, 2007 - {$696} | 611 pins 1600MHz (266x6.0) (128-bit dual-pumped bus) ?v | PAC611 | ?KB data ?KB instruction 1MB on-Die unified L2 6MB on-Die unified L3 | 1720 million 0.09µm process 596mm² die |
Itanium 9120N MMX SSE (Montvale) (dual core, Jackson Hyperthreading, VT) October 31, 2007 | 611 pins 1400MHz (200x7.0) (128-bit dual-pumped bus) ?v | PAC611 | 2x ?KB data 2x ?KB instruction 2x 1MB on-Die unified L2 2x 6MB on-Die unified L3 | 1720 million 0.09µm process 596mm² die |
Itanium 9130M MMX SSE (Montvale) (dual core, Jackson Hyperthreading, VT) October 31, 2007 | 611 pins 1666MHz (333x5.0) (128-bit dual-pumped bus) ?v | PAC611 | 2x ?KB data 2x ?KB instruction 2x 1MB on-Die unified L2 2x 4MB on-Die unified L3 | 1720 million 0.09µm process 596mm² die |
Itanium 9140M MMX SSE (Montvale) (dual core, Jackson Hyperthreading, VT) October 31, 2007 | 611 pins 1666MHz (333x5.0) (128-bit dual-pumped bus) ?v | PAC611 | 2x ?KB data 2x ?KB instruction 2x 1MB on-Die unified L2 2x 9MB on-Die unified L3 | 1720 million 0.09µm process 596mm² die |
Itanium 9140N MMX SSE (Montvale) (dual core, Jackson Hyperthreading, VT) October 31, 2007 | 611 pins 1600MHz (266x6.0) (128-bit dual-pumped bus) ?v | PAC611 | 2x ?KB data 2x ?KB instruction 2x 1MB on-Die unified L2 2x 9MB on-Die unified L3 | 1720 million 0.09µm process 596mm² die |
Itanium 9150M MMX SSE (Montvale) (dual core, Jackson Hyperthreading, VT) October 31, 2007 - {$3692} | 611 pins 1666MHz (333x5.0) (128-bit dual-pumped bus) ?v | PAC611 | 2x ?KB data 2x ?KB instruction 2x 1MB on-Die unified L2 2x 12MB on-Die unified L3 | 1720 million 0.09µm process 596mm² die |
Itanium 9150N MMX SSE (Montvale) (dual core, Jackson Hyperthreading, VT) October 31, 2007 - {$3692} | 611 pins 1600MHz (266x6.0) (128-bit dual-pumped bus) ?v | PAC611 | 2x ?KB data 2x ?KB instruction 2x 1MB on-Die unified L2 2x 12MB on-Die unified L3 | 1720 million 0.09µm process 596mm² die |
Itanium 9152M MMX SSE (Montvale) (dual core, Jackson Hyperthreading, VT) 4Q 2007 | 611 pins 1666MHz (333x5.0) (128-bit dual-pumped bus) ?v | PAC611 | 2x ?KB data 2x ?KB instruction 2x 1MB on-Die unified L2 2x 12MB on-Die unified L3 | 1720 million 0.09µm process 596mm² die |
(Millington - 2-way) (dual core, Jackson Hyperthreading) 20?? | ? pins ?MHz (?x?) (128-bit dual-pumped bus) ?v | ? | 2x ?KB data 2x ?KB instruction 2x ?MB on-Die unified L2 2x ?MB on-Die unified L3 | ? million ?µm process ?mm² die |
(Shavano) (SMT Hyperthreading) 20?? | ? pins ?MHz (?x?) (128-bit dual-pumped bus) ?v | ? | ?KB data ?KB instruction ?MB on-Die unified L2 ?MB on-Die unified L3 | ? million ?µm process ?mm² die |
Itanium 9310 MMX SSE (Tukwila) (128-bit on-Die DDR3 on-Die Registered PC6400 mem controller) (dual core, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT) February 8, 2010 - {$946} | 1248 balls 1600MHz (133x12) (64-bit QPI) ?v | Socket 1248 | 2x 16KB data (4-way) 2x 16KB instruction (4-way) 2x 256KB data L2 (8-way) 2x 512KB instruction L2 (8-way) 2x 5MB on-Die unified L3 (12-way) | 2050 million 0.065µm process 700mm² die |
Itanium 9320 MMX SSE (Tukwila) (128-bit on-Die DDR3 on-Die Registered PC6400 mem controller) (quad core, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) February 8, 2010 - {$1614} | 1248 balls 1333MHz (133x10) (1.46GHz Turbo) (64-bit QPI) ?v | Socket 1248 | 4x 16KB data (4-way) 4x 16KB instruction (4-way) 4x 256KB data L2 (8-way) 4x 512KB instruction L2 (8-way) 4x 4MB on-Die unified L3 (12-way) | 2050 million 0.065µm process 700mm² die |
Itanium 9330 MMX SSE (Tukwila) (128-bit on-Die DDR3 on-Die Registered PC6400 mem controller) (quad core, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) February 8, 2010 - {$2059} | 1248 balls 1466MHz (133x11) (1.6GHz Turbo) (64-bit QPI) ?v | Socket 1248 | 4x 16KB data (4-way) 4x 16KB instruction (4-way) 4x 256KB data L2 (8-way) 4x 512KB instruction L2 (8-way) 4x 5MB on-Die unified L3 (12-way) | 2050 million 0.065µm process 700mm² die |
Itanium 9340 MMX SSE (Tukwila) (128-bit on-Die DDR3 on-Die Registered PC6400 mem controller) (quad core, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) February 8, 2010 - {$2059} | 1248 balls 1600MHz (133x12) (1.73GHz Turbo) (64-bit QPI) ?v | Socket 1248 | 4x 16KB data (4-way) 4x 16KB instruction (4-way) 4x 256KB data L2 (8-way) 4x 512KB instruction L2 (8-way) 4x 5MB on-Die unified L3 (12-way) | 2050 million 0.065µm process 700mm² die |
Itanium 9350 MMX SSE (Tukwila) (128-bit on-Die DDR3 on-Die Registered PC6400 mem controller) (quad core, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT, Turbo) February 8, 2010 - {$3838} | 1248 balls 1733MHz (133x13) (1.86GHz Turbo) (64-bit QPI) ?v | Socket 1248 | 4x 16KB data (4-way) 4x 16KB instruction (4-way) 4x 256KB data L2 (8-way) 4x 512KB instruction L2 (8-way) 4x 6MB on-Die unified L3 (12-way) | 2050 million 0.065µm process 700mm² die |
(Dimona) (dual core, SMT Hyperthreading) [cancelled] | ? balls ?MHz (?x?) (64-bit QPI) ?v | Socket 1248 | 2x ?KB data (4-way) 2x ?KB instruction (4-way) 2x 256KB data L2 (8-way) 2x 512KB instruction L2 (8-way) 2x ?MB on-Die unified L3 (12-way) | ? million ?µm process ?mm² die |
Itanium 9520 MMX SSE (Poulson) (quad core, SMT Hyperthreading, NX bit, VT) November 8, 2012 - {$1350} | 1248 balls 1733MHz (133x13) (64-bit QPI) ?v | Socket 1248 | 4x 16KB data (4-way) 4x 16KB instruction (4-way) 4x 256KB data L2 (8-way) 4x 512KB instruction L2 (8-way) 20MB on-Die shared L3 (32-way) | 3100 million 0.032µm process 544mm² die |
Itanium 9540 MMX SSE (Poulson) (8-cores, SMT Hyperthreading, NX bit, VT) November 8, 2012 | 1248 balls 2133MHz (133x16) (64-bit QPI) ?v | Socket 1248 | 8x 16KB data (4-way) 8x 16KB instruction (4-way) 8x 256KB data L2 (8-way) 8x 512KB instruction L2 (8-way) 24MB on-Die shared L3 (32-way) | 3100 million 0.032µm process 544mm² die |
Itanium 9550 MMX SSE (Poulson) (quad core, SMT Hyperthreading, NX bit, VT) November 8, 2012 | 1248 balls 2400MHz (133x18) (64-bit QPI) ?v | Socket 1248 | 4x 16KB data (4-way) 4x 16KB instruction (4-way) 4x 256KB data L2 (8-way) 4x 512KB instruction L2 (8-way) 32MB on-Die shared L3 (32-way) | 3100 million 0.032µm process 544mm² die |
Itanium 9560 MMX SSE (Poulson) (8-cores, SMT Hyperthreading, NX bit, VT) November 8, 2012 - {$4650} | 1248 balls 2533MHz (133x19) (64-bit QPI) ?v | Socket 1248 | 8x 16KB data (4-way) 8x 16KB instruction (4-way) 8x 256KB data L2 (8-way) 8x 512KB instruction L2 (8-way) 32MB on-Die shared L3 (32-way) | 3100 million 0.032µm process 544mm² die |
Itanium 9720 MMX SSE (Kittson) (quad core, SMT Hyperthreading, NX bit, VT, Turbo) May 11, 2017 | 1248 balls 1733MHz (133x13) (64-bit QPI) ?v | Socket 1248 | 4x 16KB data (4-way) 4x 16KB instruction (4-way) 4x 256MB data L2 (8-way) 4x 512MB instruction L2 (8-way) 20MB on-Die shared L3 (32-way) | 3100 million 0.032µm process 544mm² die |
Itanium 9740 MMX SSE (Kittson) (8-cores, SMT Hyperthreading, NX bit, VT, Turbo) May 11, 2017 | 1248 balls 2133MHz (133x16) (64-bit QPI) ?v | Socket 1248 | 8x 16KB data (4-way) 8x 16KB instruction (4-way) 8x 256MB data L2 (8-way) 8x 512MB instruction L2 (8-way) 24MB on-Die shared L3 (32-way) | 3100 million 0.032µm process 544mm² die |
Itanium 9750 MMX SSE (Kittson) (quad core, SMT Hyperthreading, NX bit, VT, Turbo) May 11, 2017 | 1248 balls 2533MHz (133x19) (64-bit QPI) ?v | Socket 1248 | 4x 16KB data (4-way) 4x 16KB instruction (4-way) 4x 256MB data L2 (8-way) 4x 512MB instruction L2 (8-way) 32MB on-Die shared L3 (32-way) | 3100 million 0.032µm process 544mm² die |
Itanium 9760 MMX SSE (Kittson) (8-cores, SMT Hyperthreading, NX bit, VT, Turbo) May 11, 2017 | 1248 balls 2666MHz (133x20) (64-bit QPI) ?v | Socket 1248 | 8x 16KB data (4-way) 8x 16KB instruction (4-way) 8x 256MB data L2 (8-way) 8x 512MB instruction L2 (8-way) 32MB on-Die shared L3 (32-way) | 3100 million 0.032µm process 544mm² die |